Mosfet with fully overlapped lightly doped drain structure and method for manufacturing same

Claim 1

A method for manufacturing a MOSFET with a fully overlapped lightly doped drain structure which is manufactured on a first type of semiconductor material, the method comprising the steps of: doping a second type of dopant into the first type of semiconductor material to form a second type of lightly doped region; sequentially forming a gate insulator and a first conductive layer on the first type of semiconductor material; forming a masking layer on the first conductive layer, the masking layer being formed with an opening defining a channel region of the MOSFET; forming sidewall spacers on sidewalls of the opening; doping a first type of dopant into the second type of lightly doped region to form the channel region by using the masking layer and the sidewall spacers as a mask; forming a second conductive layer on the first conductive layer and between the sidewall spacers; removing the masking layer; removing a portion of the first conductive layer not positioned under the second conductive layer and the sidewall spacers so that the second conductive layer and a remainder of the first conductive layer define a gate of the MOSFET; and doping a second type of dopant into the first type of semiconductor material by using the gate as a mask to form a second type of heavily doped regions; whereby the second type of heavily doped regions combined with the second type of lightly doped regions under the gate form a source and a drain, respectively, of the MOSFET.

Claim 2

A method for manufacturing a MOSFET with a fully overlapped lightly doped drain structure which is manufactured on a first type of semiconductor material, the method comprising the steps of: doping a second type of dopant into the first type of semiconductor material to form a second type of lightly doped region; sequentially forming a gate insulator and a first conductive layer on the first type of semiconductor material; forming a masking layer on the first conductive layer, the masking layer being formed with an opening defining a channel region of the MOSFET; forming sidewall spacers on sidewalls of the opening; doping a first type of dopant into the second type of lightly doped region to form the channel region by using the masking layer and the sidewall spacers as a mask; forming a second conductive layer on the first conductive layer and between the sidewall spacers; removing the masking layer; removing a portion of the first conductive layer not positioned under the second conductive layer and the sidewall spacers so that the second conductive layer and a remainder of the first conductive layer define a gate of the MOSFET; and doping a second type of dopant into the first type of semiconductor material by using the gate as a mask to form a second type of heavily doped regions; whereby the second type of heavily doped regions combined with the second type of lightly doped regions under the gate form a source and a drain, respectively, of the MOSFET.