US5561472A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Video converter having relocatable and resizable windows
Assignee: Pinnacle Systems Inc
•
Filing: 1994-11-17
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Granted: 1996-10-01
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Expires: 2014-11-17
Abstract
Abstract A general purpose scan converter for converting video signals from one scan rate to another scan rate. The scan converter accepts NTSC, PAL, EGA, VGA, or other inputs in standard video formats and convert them to be displayed on a monitor. Several modes of operation including continuous frame grabbing, grab and hold image, and dynamic scaling are provided. In addition, window sizing and window location options are under user control. The input sources for video may be selected, and a robust voltage controlled oscillator is provided for timing. The converter device operates continuously in real time and provides a high resolution output signal to a monitor.
Inventors
- 👤 Michael Maietta
- 👤 David M. Smith
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-02 02:53
CPC Classifications
G; G09; G09G; G09G5/00; G09G5/36; G09G5/39; G09G5/393; G09G5/14; G09G5/391; H; H04; H04N; H04N9/00; H04N9/64; H04N9/642; G09G2340/00; G09G2340/12; G09G2340/125
Claims Analysis
Total Claims: 33
Claim 1
Independent Claim
135 words
A converter for converting a video signal from a first data rate to a second data rate, comprising: a pixel buffer for receiving a portion of the video signal at the first data rate; an address generator for determining a display location for the video signal; a non-interlaced raster frame buffer operatively connected to the pixel buffer for receiving the video signal at the second data rate; a control sequencer operatively connected to the pixel buffer and to the address generator for providing the portion of the video signal stored in the pixel buffer and the display location to the frame buffer upon occurrence of a predetermined event; and means for controlling, in response to a user command, a display size and the display location of the video signal, wherein the display is a window.
Claim 2
Dependent Claim
135 words
A converter for converting a video signal from a first data rate to a second data rate, comprising: a pixel buffer for receiving a portion of the video signal at the first data rate; an address generator for determining a display location for the video signal; a non-interlaced raster frame buffer operatively connected to the pixel buffer for receiving the video signal at the second data rate; a control sequencer operatively connected to the pixel buffer and to the address generator for providing the portion of the video signal stored in the pixel buffer and the display location to the frame buffer upon occurrence of a predetermined event; and means for controlling, in response to a user command, a display size and the display location of the video signal, wherein the display is a window.
Claim 3
Dependent Claim
21 words
The device of claim 1, wherein the predetermined event is receipt of a signal indicating a status of the frame buffer.
Claim 4
Dependent Claim
46 words
The device of claim 1, further comprising: a decoder for receiving a plurality of types of analog video signals; a converter for converting any of the types of analog video signals to a digital signal; and means for providing the digital signal to the pixel buffer.
Claim 5
Dependent Claim
17 words
The device of claim 3, wherein the pixel buffer stores the digital signal as twenty-four data bits.
Claim 6
Dependent Claim
44 words
The device of claim 1, wherein the means for controlling a display size and location comprises: means for connecting the converter to a processor; and user interface means operatively connected to the processor for controlling the address generator in accordance with user supplied commands.
Claim 7
Dependent Claim
29 words
The device of claim 1, further comprising an oscillator phase locked to a conditional timing signal in the video signal, for providing a timing signal to the control sequencer.
Claim 8
Dependent Claim
25 words
The device of claim 1, further comprising means for selectively allowing a host computer to control provision of a second signal to the frame buffer.
Claim 9
Dependent Claim
39 words
The device of claim 7, wherein the means for selectively allowing includes storage elements in the frame buffer for receiving the second signal, and wherein the storage elements are operatively connected to video memory elements in the frame buffer.
Claim 10
Dependent Claim
25 words
The device of claim 1, wherein the predetermined event is receipt of a control signal from a host computer operatively connected to the control sequencer.
Claim 11
Dependent Claim
182 words
A converter for converting scan rates of video signals, comprising: a pixel buffer for storing a portion of a video signal having a first data rate which is that of an interlaced raster scan; an address generator for determining a display location for the first video signal; a non-interlaced raster frame buffer operatively connected to the buffer for receiving video signals at a second data rate differing from the first data rate; a control sequencer operatively connected to the pixel buffer and to the address generator for providing the portion of the video signal stored in the pixel buffer and the display location to the frame buffer upon receipt of a signal from the frame buffer indicating a status of the frame buffer, and upon receipt of a control signal from a host computer; means for providing a second video data signal under control of a host computer directly from an external source to the frame buffer; and means for determining whether the video signal or second video data signal is to be provided to the frame buffer at any particular time.
Claim 12
Dependent Claim
182 words
A converter for converting scan rates of video signals, comprising: a pixel buffer for storing a portion of a video signal having a first data rate which is that of an interlaced raster scan; an address generator for determining a display location for the first video signal; a non-interlaced raster frame buffer operatively connected to the buffer for receiving video signals at a second data rate differing from the first data rate; a control sequencer operatively connected to the pixel buffer and to the address generator for providing the portion of the video signal stored in the pixel buffer and the display location to the frame buffer upon receipt of a signal from the frame buffer indicating a status of the frame buffer, and upon receipt of a control signal from a host computer; means for providing a second video data signal under control of a host computer directly from an external source to the frame buffer; and means for determining whether the video signal or second video data signal is to be provided to the frame buffer at any particular time.
Claim 13
Independent Claim
113 words
A method of converting a scan rate of a video signal comprising the steps of: storing less than one scan line of the video signal which is received at a first data rate; providing the stored portion of the video signal to a frame buffer at a second data rate differing from the first data rate, upon occurrence of a predetermined event; selectively providing, under control of a host computer, a second video data signal from an external source to the frame buffer; determining a location on a display for the video signal; and providing the portion of the video signal stored in the frame buffer to the display at the predetermined location.
Claim 14
Independent Claim
113 words
A method of converting a scan rate of a video signal comprising the steps of: storing less than one scan line of the video signal which is received at a first data rate; providing the stored portion of the video signal to a frame buffer at a second data rate differing from the first data rate, upon occurrence of a predetermined event; selectively providing, under control of a host computer, a second video data signal from an external source to the frame buffer; determining a location on a display for the video signal; and providing the portion of the video signal stored in the frame buffer to the display at the predetermined location.
Claim 15
Dependent Claim
44 words
The method of claim 11, further comprising, prior to the step of storing, the steps of: providing a plurality of analog video signals each being of a different television standard; and converting each of the plurality of analog video signals to a digital signal.
Claim 16
Dependent Claim
24 words
The device of claim 1, further comprising means for providing to the buffer video signals of any one of a plurality of television standards.
Claim 17
Dependent Claim
156 words
A converter for converting a video signal from a first data rate to a second data rate comprising: a pixel buffer for receiving a portion of the video signal at the first data rate; an address generator for determining a display location for the video signal; a frame buffer operatively connected to the buffer for storing the video signal at the second data rate differing from the first data rate; means for selectively providing, under control of a host computer, a second video data signal from an external source to a port of the frame buffer; a control sequencer operatively connected to the buffer and to the address generator for providing the portion of the video signal stored in said buffer and the display location to the frame buffer, upon occurrence of a predetermined event; and means for providing the portion of the video signal in the frame buffer to the display at the display location.
Claim 18
Dependent Claim
156 words
A converter for converting a video signal from a first data rate to a second data rate comprising: a pixel buffer for receiving a portion of the video signal at the first data rate; an address generator for determining a display location for the video signal; a frame buffer operatively connected to the buffer for storing the video signal at the second data rate differing from the first data rate; means for selectively providing, under control of a host computer, a second video data signal from an external source to a port of the frame buffer; a control sequencer operatively connected to the buffer and to the address generator for providing the portion of the video signal stored in said buffer and the display location to the frame buffer, upon occurrence of a predetermined event; and means for providing the portion of the video signal in the frame buffer to the display at the display location.
Claim 19
Independent Claim
113 words
A device for converting a scan rate of a video signal comprising: means for storing less than one scan line of the video signal which is received at a first data rate; a frame buffer; means for providing the stored data portion in the frame buffer at a second data rate upon occurrence of a predetermined event; means for selectively providing, under control of a host computer, a second video data signal from an external source to a port of the frame buffer; means for determining a location on a video display for the video signal; and means for providing the stored portion of the video signal for display at the determined location.
Claim 20
Independent Claim
113 words
A device for converting a scan rate of a video signal comprising: means for storing less than one scan line of the video signal which is received at a first data rate; a frame buffer; means for providing the stored data portion in the frame buffer at a second data rate upon occurrence of a predetermined event; means for selectively providing, under control of a host computer, a second video data signal from an external source to a port of the frame buffer; means for determining a location on a video display for the video signal; and means for providing the stored portion of the video signal for display at the determined location.
Claim 21
Dependent Claim
25 words
The device of claim 14, wherein the second video data signal provided to the frame buffer includes address and control signals from the host computer.
Claim 22
Dependent Claim
32 words
The device of claim 10, further comprising means for controlling, in response to a command, a display size and the display location of the video signal, wherein the display is a window.
Claim 23
Dependent Claim
37 words
The device of claim 17, wherein the means for controlling comprises: means for connecting to a processor; and a user interface operatively connectable to the processor for controlling the address generator in accordance with a user command.
Claim 24
Dependent Claim
24 words
The device of claim 10, wherein the second video data signal to the frame buffer includes address and control signals from the host computer.
Claim 25
Dependent Claim
34 words
The method of claim 11, the step of selectively providing further comprising providing address and control portions of the second video data signal to a port of the frame buffer from the host computer.
Claim 26
Dependent Claim
25 words
The device of claim 15, wherein the second video data signal provided to the frame buffer includes address and control signals from the host computer.
Claim 27
Dependent Claim
18 words
The method of claim 11, further comprising the step of providing control of the location on the display.
Claim 28
Dependent Claim
26 words
The device of claim 10, wherein the raster frame buffer includes a port for receipt of the second video data signal directly from the external source.
Claim 29
Dependent Claim
17 words
The device of claim 11, wherein the pixel buffer stores only several pixels of video digital data.
Claim 30
Dependent Claim
19 words
The device of claim 1, wherein the pixel buffer stores a maximum of 64 pixels of video digital data.
Claim 31
Dependent Claim
20 words
The device of claim 1, wherein the pixel buffer stores less than one video scan line of video digital data.
Claim 32
Dependent Claim
19 words
The method of claim 11, wherein the step of storing comprises storing only several pixels of the video signal.
Claim 33
Dependent Claim
21 words
The method of claim 11, wherein the step of storing comprises storing a maximum of 64 pixels of the video signal.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1999-10-01 | 2000-04-01 | 2000-10-01 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2003-10-01 | 2004-04-01 | 2004-10-01 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2007-10-01 | 2008-04-01 | 2008-10-01 | $7700.00 | Window Closed / Lapsed |