Patent US5556797A successfully refreshed from Google Patents.
US5556797A
Expired / Lapsed
US
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Method of fabricating a self-aligned double recess gate profile
Assignee: Raytheon Co
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Filing: 1995-05-30
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Granted: 1996-09-17
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Expires: 2015-05-30
Abstract
Abstract A method of fabricating a self-aligned double gate recess profile in a semiconductor substrate is disclosed in which a first mask layer is formed over the substrate. A second mask layer having an opening is formed over the first mask layer. An opening at least as wide as the second mask layer's opening is formed through the first mask layer to expose the substrate beneath the second mask layer's opening. A first recess is etched in the semiconductor through the second mask layer's opening. The first mask layer's opening is then uniformly expanded and a wider recess, aligned to the first recess, is then formed in the semiconductor. The method is particularly applicable to the formation of self-aligned gate and channel recesses in a GaAs MESFET.
Inventors
- 👤 Tom Y. Chi
- 👤 Liping D. Hou
- 👤 Kusol Lee
- 👤 Danny Li
- 👤 Ishver K. Naik
- 👤 Tom Quach
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 03:00
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/01; H10D30/061; H10D30/0612; H10D30/0614; H10D30/80; H10D30/87; H10D30/877
Claims Analysis
Total Claims: 14
Claim 1
Independent Claim
162 words
A method of forming a desired recess profile in a semiconductor substrate, comprising: forming a first mask layer in direct contact with said substrate, wherein said first mask layer has a thickness of 30-70 angstroms, forming a second mask layer with an opening over said first mask layer; forming an initial opening through said first mask layer to expose the substrate beneath said first opening in said second mask layer, with said initial opening being at least as wide as said first opening in said second mask layer, forming an initial recess in said substrate through said first opening in said second mask layer, wherein said initial recess has a first width, uniformly expanding said initial opening in said first mask layer to form a subsequent opening in Said first .mask layer, and forming a second recess in said substrate wherein said second recess has a second width which is wider than said first width and is centered on said initial recess.
Claim 2
Independent Claim
162 words
A method of forming a desired recess profile in a semiconductor substrate, comprising: forming a first mask layer in direct contact with said substrate, wherein said first mask layer has a thickness of 30-70 angstroms, forming a second mask layer with an opening over said first mask layer; forming an initial opening through said first mask layer to expose the substrate beneath said first opening in said second mask layer, with said initial opening being at least as wide as said first opening in said second mask layer, forming an initial recess in said substrate through said first opening in said second mask layer, wherein said initial recess has a first width, uniformly expanding said initial opening in said first mask layer to form a subsequent opening in Said first .mask layer, and forming a second recess in said substrate wherein said second recess has a second width which is wider than said first width and is centered on said initial recess.
Claim 3
Dependent Claim
14 words
The method of claim 1, wherein said first mask layer comprises an oxide layer.
Claim 4
Dependent Claim
27 words
The method of claim 1, wherein said second mask layer comprises a layer of photoresist and said first opening is disposed over a desired initial recess area.
Claim 5
Dependent Claim
33 words
The method of claim 3, wherein said expanding of said initial opening in said first mask layer is provided by removing a portion of said first mask layer from beneath said photoresist layer.
Claim 6
Dependent Claim
10 words
The method of claim 1, wherein said substrate comprises GaAs.
Claim 7
Independent Claim
192 words
A method of forming a GaAs microwave monolithic integrated circuit (MMIC) metal semiconductor field effect transistor (MESFET) which includes an active layer and a source and drain in a GaAs substrate, comprising: forming a first mask layer in direct contact with said active layer, wherein said first mask layer has a thickness of 30-70 angstroms, forming a second mask layer with an opening over said first mask layer; forming an initial opening through said first mask layer to expose the active layer beneath said first opening in said second mask layer, with said initial opening being at least as wide as said first opening in said second mask layer, forming a gate recess in said active layer through said first opening in said second mask layer, wherein said gate recess has a first width, expanding said initial opening in said first mask layer to form a subsequent opening in said first mask layer, and forming a channel recess in said active layer through said subsequent opening in said first mask layer wherein said channel recess has a second width which is wider than said first width and centered upon said gate recess.
Claim 8
Independent Claim
192 words
A method of forming a GaAs microwave monolithic integrated circuit (MMIC) metal semiconductor field effect transistor (MESFET) which includes an active layer and a source and drain in a GaAs substrate, comprising: forming a first mask layer in direct contact with said active layer, wherein said first mask layer has a thickness of 30-70 angstroms, forming a second mask layer with an opening over said first mask layer; forming an initial opening through said first mask layer to expose the active layer beneath said first opening in said second mask layer, with said initial opening being at least as wide as said first opening in said second mask layer, forming a gate recess in said active layer through said first opening in said second mask layer, wherein said gate recess has a first width, expanding said initial opening in said first mask layer to form a subsequent opening in said first mask layer, and forming a channel recess in said active layer through said subsequent opening in said first mask layer wherein said channel recess has a second width which is wider than said first width and centered upon said gate recess.
Claim 9
Dependent Claim
14 words
The method of claim 6, wherein said first mask layer comprises an oxide layer.
Claim 10
Dependent Claim
24 words
The method of claim 6, wherein said second mask layer comprises a layer of photoresist with an opening over a desired gate recess area.
Claim 11
Dependent Claim
44 words
The method of claim 8, wherein said expanding of said initial opening in said first mask layer is provided by removing a portion of said first mask layer from beneath said photoresist layer to uniformly expand said initial opening in said first mask layer.
Claim 12
Independent Claim
169 words
A method for forming a GaAs microwave monolithic integrated circuit (MMIC) metal semiconductor field effect transistor (MESFET) which includes an active layer and a source and drain in a GaAs substrate, comprising: forming an oxide layer over said active layer wherein said oxide layer has a thickness of 30-70 angstroms, forming a photoresist layer over said oxide layer, with an opening in said photoresist layer exposing a portion of said oxide layer over a desired recess area between said source and drain, forming an opening through said oxide layer at least as wide as said photoresist opening by removing at least said exposed portion of said oxide layer, forming a gate recess in said active layer through said photoresist opening, uniformly expanding said oxide layer opening by removing a portion of said oxide layer beneath said photoresist layer, and etching said substrate through said expanded oxide layer opening to deepen said gate recess, and to form a channel recess that is wider than and centered upon said gate recess.
Claim 13
Independent Claim
169 words
A method for forming a GaAs microwave monolithic integrated circuit (MMIC) metal semiconductor field effect transistor (MESFET) which includes an active layer and a source and drain in a GaAs substrate, comprising: forming an oxide layer over said active layer wherein said oxide layer has a thickness of 30-70 angstroms, forming a photoresist layer over said oxide layer, with an opening in said photoresist layer exposing a portion of said oxide layer over a desired recess area between said source and drain, forming an opening through said oxide layer at least as wide as said photoresist opening by removing at least said exposed portion of said oxide layer, forming a gate recess in said active layer through said photoresist opening, uniformly expanding said oxide layer opening by removing a portion of said oxide layer beneath said photoresist layer, and etching said substrate through said expanded oxide layer opening to deepen said gate recess, and to form a channel recess that is wider than and centered upon said gate recess.
Claim 14
Dependent Claim
20 words
The method of claim 10, wherein said oxide layer is removed by etching it with HCl or NN 4 OH.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1999-09-17 | 2000-03-18 | 2000-09-17 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2003-09-17 | 2004-03-18 | 2004-09-17 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2007-09-17 | 2008-03-18 | 2008-09-17 | $7700.00 | Window Closed / Lapsed |