Data shifting circuit capable of an original data width rotation and a double data width rotation

Claim 1

A data shifting circuit comprising: barrel shifter means for shifting, by a plurality of bits, first data which has a width twice that of an original data width, said barrel shifter means having high order bits and low order bits, said original data width having a specified number of bits, and said high order bits and said low order bits each being the specified number of bits; register group means having a plurality of registers for storing register data, each register having respective outputs, each respective output supplying respective register output; and data controller means for selecting as second data, a first register output from a first register of the plurality of registers commonly supplied to the high order bits and the low order bits of said barrel shifter means, in response to a request for shifting data of said original data width, and for selecting a second register output from a second register of the plurality of registers and a third register output from a third register of the plurality of registers when a double bit data width shift request signal is input to select said second register, said third register having a selected relationship with said second register, the selected relationship being defined when said double bit width shift request signal is input, and for supplying said second register output and said third register output, as bit data, to said barrel shifter means, in response to said double bit data width request signal.