Image coding-decoding apparatus with efficient memory access

Claim 1

An image-signal coding-decoding apparatus comprising: (a) a means for subtracting a reference image signal from an input image signal to obtain an image signal; (b) an intra-frame coding means for coding the image signal output from the subtracting means, and data on the reference image signal; (c) a memory unit; (d) a first inter-frame prediction means for performing image prediction among previous or future image data and for sending the reference image signal to the subtracting means and the intra-frame coding means, the reference image signal being produced based on a previously reconstructed image signal from the memory unit, the first inter-frame prediction means including an input-output circuit in which pixel data of luminance signals are separated from those of color signals, and the separated pixel data are arranged in a single row of a horizontal direction as a minimum unit, so that the input-output circuit transfers data to the memory unit; (e) an intra-frame decoding means for decoding the image signal sent from the intra-frame coding means, so as to produce an inter-frame difference image signal and a data signal on how to generate the reference signal; (f) a second inter-frame prediction means for producing a reference image signal based on the data signal sent from the intra-frame decoding means, and the previously reconstructed image signal read out from the memory unit; and (g) an addition means for adding the inter-frame difference image signal output from the intra-frame decoding means, to the reference image signal sent from the second inter-frame prediction means, and for sending the added signal to the memory unit, wherein the intra-frame decoding means includes: a plurality of shift registers by which the image signal is shifted per pixel; a first switch means for receiving and switching the shifted pixels from the shift registers; a first memory means in which only luminance pixel data are written thereto in a unit of 8 pixels; a secondary memory means in which only a pair of color pixel data are written thereto through the first switch means, every time 4 pixel data for each of color pixel data are stored in the shift registers; and a second switch means for receiving and switching the data sent from the first or second memory means and for sending the switched data to the addition means.