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US5537659A Expired / Lapsed US ⏱️ 0.0 years remaining

Bus controller for adjusting port size communication between a bus master and bus slave using bus master information

Assignee: Renesas Electronics Corp
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Filing: 1995-03-02
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Granted: 1996-07-16
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Expires: 2015-03-02
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Abstract

Abstract A bus controller (20) for a data processing system, in which data is transferred between a bus master (10) and a bus slave (30) of a plurality of different data port sizes, is able to obtain port size information from an address signal using an incorporated address area/port size correspondence table (211), whereby a port size signal as a response signal from the bus slave is made unnecessary, thus simplifying the data processing system.

Inventors

  • 👤 Yuichi Nakao

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-06 20:07
CPC Classifications
G; G06; G06F; G06F13/00; G06F13/38; G06F13/40; G06F13/4004; G06F13/4009; G06F13/4018

Claims Analysis

Total Claims: 10
Claim 1
Independent Claim 124 words
A bus controller connected between a bus master and a plurality of bus slaves to transfer data between the bus master and bus slaves with a plurality of different data port widths said bus controller comprising: a port size correspondence table external to the plurality of bus slaves, said port size correspondence table maintaining port width information and address information for a selected group of said bus slaves during a plurality of data transfer operations; and determination means coupled to said port size correspondence table for deriving port size information from address information obtained from said bus master using said correspondence table during one of said data transfer operations, capable of determining a port size without waiting for a signal from a bus slave.
Claim 2
Dependent Claim 124 words
A bus controller connected between a bus master and a plurality of bus slaves to transfer data between the bus master and bus slaves with a plurality of different data port widths said bus controller comprising: a port size correspondence table external to the plurality of bus slaves, said port size correspondence table maintaining port width information and address information for a selected group of said bus slaves during a plurality of data transfer operations; and determination means coupled to said port size correspondence table for deriving port size information from address information obtained from said bus master using said correspondence table during one of said data transfer operations, capable of determining a port size without waiting for a signal from a bus slave.
Claim 3
Dependent Claim 22 words
The bus controller of claim 1, wherein said bus controller is made as a single semiconductor integrated circuit with said bus master.
Claim 4
Dependent Claim 34 words
The bus controller of claim 1 wherein said bus master is a data processor with an address area corresponding wait controller having a wait value correspondence table which has a port size designation field.
Claim 5
Dependent Claim 127 words
A bus controller connected between a bus master and one or more bus slaves said bus controller comprising: a port size correspondence table containing port width information and address information for a selected group of one or more of said bus slaves, said port size correspondence table being exterior to said selected group of bus slaves and said port width information being optionally set in a register provided for said port size correspondence table prior to a data transfer operation; and determination means, coupled to said port size correspondence table, for deriving port size information for a bus slave during the data transfer operation from address information obtained from the bus master, capable of determining a port size without waiting for a signal from a bus slave.
Claim 6
Dependent Claim 127 words
A bus controller connected between a bus master and one or more bus slaves said bus controller comprising: a port size correspondence table containing port width information and address information for a selected group of one or more of said bus slaves, said port size correspondence table being exterior to said selected group of bus slaves and said port width information being optionally set in a register provided for said port size correspondence table prior to a data transfer operation; and determination means, coupled to said port size correspondence table, for deriving port size information for a bus slave during the data transfer operation from address information obtained from the bus master, capable of determining a port size without waiting for a signal from a bus slave.
Claim 7
Dependent Claim 35 words
The bus controller of claim 4 wherein said bus controller further comprises: port size adjustment means, coupled to said port size correspondence table, for updating port width information contained in said port size correspondence table.
Claim 8
Dependent Claim 132 words
A bus controller connected between a bus master and a plurality of bus slaves to transfer data between the bus master and bus slaves with a plurality of different data port widths, said bus controller comprising: a port size correspondence table including port width information and address information for a selected group of one or more of the plurality of bus slaves, said port width information being optionally set in a register provided for said port size correspondence table prior to a data transfer operation; and determination means, coupled to said port size correspondence table, for deriving, during the data transfer operation, port size information for a bus slave from address information obtained from the bus master, capable of determining a port size without waiting for a signal from a bus slave.
Claim 9
Dependent Claim 132 words
A bus controller connected between a bus master and a plurality of bus slaves to transfer data between the bus master and bus slaves with a plurality of different data port widths, said bus controller comprising: a port size correspondence table including port width information and address information for a selected group of one or more of the plurality of bus slaves, said port width information being optionally set in a register provided for said port size correspondence table prior to a data transfer operation; and determination means, coupled to said port size correspondence table, for deriving, during the data transfer operation, port size information for a bus slave from address information obtained from the bus master, capable of determining a port size without waiting for a signal from a bus slave.
Claim 10
Dependent Claim 31 words
The bus controller of claim 6 further comprising: port size adjustment means, coupled to said port size correspondence table, for updating port width information contained in said port size correspondence table.

References Cited (Backward Citations)

US4447878A Cited
US4315312A Cited
US4490785A Cited
US4593267A Cited
JPS61502565A Cited
US4633437A Cited
US4716527A Cited
US4683534A Cited
US4914573A Cited
US5125084A Cited
US5109490A Cited
US5019965A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1999-07-16 2000-01-15 2000-07-16 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2003-07-16 2004-01-15 2004-07-16 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2007-07-16 2008-01-15 2008-07-16 $7700.00 Window Closed / Lapsed

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