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US5536665A
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US
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Method of manufacturing a semiconductor device with double structured well
Assignee: Mitsubishi Electric Corp
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Filing: 1995-05-17
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Granted: 1996-07-16
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Expires: 2015-05-17
Abstract
Abstract A semiconductor device includes a p-type silicon substrate, a first well of p-type formed in a major surface of the silicon substrate, and a second well of n-type formed close to the first well in the major surface of the silicon substrate. A third well of p-type is formed inside the second well and, furthermore, a conductive layer including p-type impurities of higher concentration than that of the first well is formed as extending immediately below both the first well and the second well. In accordance with this structure, even if minority carriers are injected, they recombine and disappear in the conductive layer, so that the implantation of the carriers into the first well is prevented. As a result, various disadvantageous phenomena due to the injection of the minority carriers are prevented and a semiconductor device having a stable device characteristic and high integration density is provided.
Inventors
- 👤 Shigeki Komori
- 👤 Takashi Kuroi
- 👤 Masahide Inuishi
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-08 17:27
CPC Classifications
H; H10; H10D; H10D84/00; H10D84/80; H10D84/82; H10D84/83; H10D84/85; H10D84/854; H10B; H10B12/00; H10B12/30; Y; Y10; Y10S; Y10S148/00; Y10S148/085
Claims Analysis
Total Claims: 10
Claim 1
Independent Claim
238 words
A method of manufacturing a semiconductor device having a double structured well, comprising the steps of: implanting impurities having a first conductivity type in a surface of a semiconductor substrate with a prescribed implantation energy and dose and forming a buried conductive layer from the surface to a prescribed depth in a prescribed region of said semiconductor substrate; forming a mask of a prescribed pattern on said semiconductor substrate, implanting impurities having a second conductivity type with a prescribed implantation energy and dose and forming a plate-like well having the second conductivity type in a prescribed region directly on said conductive layer; forming a mask of a prescribed pattern over said semiconductor substrate, implanting impurities having the second conductivity type with a prescribed implantation energy and dose and forming a cylindrical well of the second conductivity type surrounding the periphery of said well of the second conductivity type and extending from the surface of said semiconductor substrate to said well of the second conductivity type; and forming a mask of a prescribed pattern over the semiconductor substrate, implanting impurities of the first conductivity type with a prescribed implantation energy and dose, and forming a well of the first conductivity type in a region surrounded by said plate-like well of the second conductivity type and said cylindrical well of the second conductivity type and in the vicinity of the outside of said cylindrical well of the second conductivity type.
Claim 2
Independent Claim
238 words
A method of manufacturing a semiconductor device having a double structured well, comprising the steps of: implanting impurities having a first conductivity type in a surface of a semiconductor substrate with a prescribed implantation energy and dose and forming a buried conductive layer from the surface to a prescribed depth in a prescribed region of said semiconductor substrate; forming a mask of a prescribed pattern on said semiconductor substrate, implanting impurities having a second conductivity type with a prescribed implantation energy and dose and forming a plate-like well having the second conductivity type in a prescribed region directly on said conductive layer; forming a mask of a prescribed pattern over said semiconductor substrate, implanting impurities having the second conductivity type with a prescribed implantation energy and dose and forming a cylindrical well of the second conductivity type surrounding the periphery of said well of the second conductivity type and extending from the surface of said semiconductor substrate to said well of the second conductivity type; and forming a mask of a prescribed pattern over the semiconductor substrate, implanting impurities of the first conductivity type with a prescribed implantation energy and dose, and forming a well of the first conductivity type in a region surrounded by said plate-like well of the second conductivity type and said cylindrical well of the second conductivity type and in the vicinity of the outside of said cylindrical well of the second conductivity type.
Claim 3
Dependent Claim
68 words
The method of manufacturing the semiconductor device having the double structured well according to claim 1, further comprising a step of forming a mask of a prescribed pattern over said semiconductor substrate, implanting impurities of the first conductivity type with a prescribed implantation energy and dose, and forming a cylindrical conductive layer so as to surround the outer periphery of said cylindrical well of the second conductivity type.
Claim 4
Dependent Claim
105 words
The method of manufacturing the semiconductor device having the double structured well according to claim 1, further comprising a step of forming a mask of a prescribed pattern over said semiconductor substrate, implanting impurities of the first conductivity type with a prescribed implantation energy and dose, and forming a cylindrical conductive layer in a region between the outer periphery of said well of the first conductivity type and said cylindrical well of the second conductivity type and a plate-like conductive layer in a region between the bottom surface of said well of the first conductivity type and said plate-like well of the second conductivity type.
Claim 5
Dependent Claim
45 words
The method of manufacturing the semiconductor device having the double structured well according to claim 1, wherein said step of forming said buried conductive layer includes implanting boron with an implantation energy of 1-3MeV and a dose of 10 12 -10 15 /cm 2 .
Claim 6
Dependent Claim
49 words
The method of manufacturing the semiconductor device having the double structured well according to claim 1, wherein said step of forming said plate-like well of the second conductivity type includes implanting phosphorus with an implantation energy of 500KeV-1.5MeV and a dose of 10 12 -10 14 /cm 2 .
Claim 7
Dependent Claim
78 words
The method of manufacturing the semiconductor device having the double structured well according to claim 1, wherein said step of forming said cylindrical well of the second conductivity type includes two steps of implantation of phosphorus with an implantation energy of 500KeV -1.5MeV and a dose of 10 12 -10 14 /cm 2 for the first time and with the implantation energy of 100KeV-500KeV and the dose of 10 11 -10 13 /cm 2 for the second time.
Claim 8
Dependent Claim
76 words
The method of manufacturing the semiconductor device having the double structured well according to claim 1, wherein said step of forming said well of the first conductivity type includes two steps of implantation of boron with an implantation energy of 300KeV-1MeV and a dose of 10 12 -10 14 /cm 2 for the first time and with the implantation energy of 50KeV-300KeV and the dose of 10 12 -10 14 /cm 2 for the second time.
Claim 9
Dependent Claim
62 words
The method of manufacturing the semiconductor device having the double structured well according to claim 2, wherein said step of forming said cylindrical conductive layer so as to surround the outer periphery of said cylindrical well of the second conductivity type includes implanting boron with an implantation energy of 1 -3MeV and a dose of 10 12 -10 15 /cm 2 .
Claim 10
Dependent Claim
99 words
The method of manufacturing the semiconductor device having the double structured well according to claim 3, wherein said steps of forming the cylindrical conductive layer in the region between the outer periphery of said well of the first conductivity type and said cylindrical well of the second conductivity type and forming said plate-like conductive layer in the region between the bottom surface of said well of the first conductivity type and said plate-like well of the second conductivity type include implanting boron with an implantation energy of 1-3MeV and a dose of 10 12 -10 15 /cm 2 .
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1999-07-16 | 2000-01-15 | 2000-07-16 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2003-07-16 | 2004-01-15 | 2004-07-16 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2007-07-16 | 2008-01-15 | 2008-07-16 | $7700.00 | Window Closed / Lapsed |