Patent US5534802A successfully refreshed from Google Patents.
← Back to Patent Explorer
US5534802A Expired / Lapsed US ⏱️ 0.0 years remaining

Sample and hold circuitry in bipolar transistor technology using a bootstrapping technique

Assignee: Avago Technologies International Sales Pte Ltd
•
Filing: 1994-09-01
•
Granted: 1996-07-09
•
Expires: 2014-09-01
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract A sample-and-hold circuit is formed in bipolar transistor technology with the aid of clocked and complementary-clocked bipolar transistors in combination with a holding capacitor whose output terminal, in going from sample to hold phases of the clock, undergoes change in voltage ΔV equal to the input voltage samples Vin applied to its input terminal during the sample phases (electrical bootstrapping operation). In particular, an input terminal of the holding capacitor is connected to a clocked input voltage device that ensures that, during the sample phases, the input voltage applied to the input terminal of the capacitor represents the input voltage being sampled, and that during the hold phases of the clock, the input terminal of the capacitor is electrically clamped. An output terminal of the holding capacitor is connected to one of the clocked transistors and to an auxiliary bipolar transistor whose base terminal is controlled by a complementary-clocked voltage-dropping device. This complementary-clocked voltage-dropping device sets the output terminal of the capacitor to a fixed voltage during the sample phases and is disconnected from this output terminal during the hold phases, whereby during the hold phases the output terminal of the holding capacitor is electrically floating and the voltage thereat represents the input voltage during the immediately preceding sample phase.

Inventors

  • 👤 Behzad Razavi

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-09 21:58
CPC Classifications
G; G11; G11C; G11C27/00; G11C27/02; G11C27/024

Claims Analysis

Total Claims: 20
Claim 1
Independent Claim 172 words
Circuitry comprising: (a) first and second clock-controlled bipolar transistors; (b) a first resistor connected to a reference supply voltage and in series with the first clock-controlled transistor, whereby a first node is formed between them and a first branch is formed by them; (c) a third bipolar transistor having a base terminal connected to the first node and having a high-current-carrying terminal connected to connected between said reference supply voltage and a second node; (d) a fourth bipolar transistor connected to said reference supply voltage and in series with the second clocked-controlled transistor, whereby a third node is formed between them and a second branch is formed by them; (e) a complementary-clocked voltage-dropping device, connected in parallel with the first and second branches, having a fourth node connected to a low-current-carrying terminal of the fourth transistor; (f) a capacitor having a first terminal connected to the second node and a second terminal connected to the third node whereby the capacitor supplies bootstrapping; and (g) an input device connected to the second node.
Claim 2
Dependent Claim 172 words
Circuitry comprising: (a) first and second clock-controlled bipolar transistors; (b) a first resistor connected to a reference supply voltage and in series with the first clock-controlled transistor, whereby a first node is formed between them and a first branch is formed by them; (c) a third bipolar transistor having a base terminal connected to the first node and having a high-current-carrying terminal connected to connected between said reference supply voltage and a second node; (d) a fourth bipolar transistor connected to said reference supply voltage and in series with the second clocked-controlled transistor, whereby a third node is formed between them and a second branch is formed by them; (e) a complementary-clocked voltage-dropping device, connected in parallel with the first and second branches, having a fourth node connected to a low-current-carrying terminal of the fourth transistor; (f) a capacitor having a first terminal connected to the second node and a second terminal connected to the third node whereby the capacitor supplies bootstrapping; and (g) an input device connected to the second node.
Claim 3
Dependent Claim 27 words
The circuitry of claim 1 further comprising electrically conductive wiring for connecting another high-current-carrying terminal of the third transistor to a high-current-carrying terminal of the fourth transistor.
Claim 4
Dependent Claim 30 words
The circuitry of claim 2 further comprising a first current source having a terminal thereof connected in series with the complementary-clocked voltage-dropping device and with the first and second branches.
Claim 5
Dependent Claim 79 words
The circuitry of claim 3 in which the complementary-clocked voltage-dropping device comprises: a dc voltage-dropping device; a second resistor; a complementary-clocked fifth bipolar transistor connected in series with both the dc voltage-dropping device and the second resistor, whereby the fourth node is formed between the fifth transistor and the dc voltage-dropping device, the fourth node being connected to the low-current-carrying terminal of the fourth transistor; and a second current source having a terminal thereof connected to the fourth node.
Claim 6
Dependent Claim 23 words
The circuitry of claim 4 further comprising a dc voltage source connected in series with the first current source and the first branch.
Claim 7
Dependent Claim 33 words
The circuitry recited in claim 2 in which the input device comprises a sixth bipolar transistor having one of its high-current-carrying terminals connected to the second node and to a third current source.
Claim 8
Dependent Claim 47 words
The circuitry of claim 2 further comprising: an output terminal of the circuitry; and a seventh bipolar transistor having a base terminal connected to the third node and having a high-current carrying terminal connected to the output terminal of the circuitry and to a fourth current source.
Claim 9
Dependent Claim 23 words
The circuitry of claim 2 further comprising a dc voltage source connected in series with the first current source and the first branch.
Claim 10
Dependent Claim 30 words
The circuitry of claim 1 further comprising a first current source having a terminal thereof connected in series with the complementary-clocked voltage-dropping device and with the first and second branches.
Claim 11
Dependent Claim 79 words
The circuitry of claim 9 in which the complementary-clocked voltage-dropping device comprises: a dc voltage-dropping device; a second resistor; a complementary-clocked fifth bipolar transistor connected in series with both the dc voltage-dropping device and the second resistor, whereby the fourth node is formed between the fifth transistor and the dc voltage-dropping device, the fourth node being connected to the low-current-carrying terminal of the fourth transistor; and a second current source having a terminal thereof connected to the fourth node.
Claim 12
Dependent Claim 33 words
The circuitry recited in claim 10 in which the input device comprises a sixth bipolar transistor having one of its high-current-carrying terminals connected to the second node and to a third current source.
Claim 13
Dependent Claim 23 words
The circuitry of claim 10 further comprising a dc voltage source connected in series with the third current source and the first branch.
Claim 14
Dependent Claim 33 words
The circuitry recited in claim 9 in which the input device comprises a sixth bipolar transistor having one of its high-current-carrying terminals connected to the second node and to a third current source.
Claim 15
Dependent Claim 23 words
The circuitry of claim 9 further comprising a dc voltage source connected in series with the first current source and the first branch.
Claim 16
Dependent Claim 79 words
The circuitry of claim 1 in which the complementary-clocked voltage-dropping device comprises: a dc voltage-dropping device; a second resistor; a complementary-clocked fifth bipolar transistor connected in series with both the dc voltage-dropping device and the second resistor, whereby the fourth node is formed between the fifth transistor and the dc voltage-dropping device, the fourth node being connected to the low-current-carrying terminal of the fourth transistor; and a second current source having a terminal thereof connected to the fourth node.
Claim 17
Dependent Claim 27 words
The circuitry of claim 15 further comprising electrically conductive wiring for connecting another high-current-carrying terminal of the third transistor to a high-current-carrying terminal of the fourth transistor.
Claim 18
Dependent Claim 33 words
The circuitry recited in claim 15 in which the input device comprises a sixth bipolar transistor having one of its high-current-carrying terminals connected to the second node and to a third current source.
Claim 19
Dependent Claim 47 words
The circuitry of claim 15 further comprising: an output terminal of the circuitry; and a seventh bipolar transistor having a base terminal connected to the third node and having a high-current carrying terminal connected to the output terminal of the circuitry and to a fourth current source.
Claim 20
Dependent Claim 23 words
The circuitry of claim 15 further comprising a dc voltage source connected in series with the first current source and the first branch.

References Cited (Backward Citations)

US4400637A Cited
US4560888A Cited
US4694341A Cited
US4873457A Cited
US5298801A Cited
US5399912A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1999-07-09 2000-01-08 2000-07-09 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2003-07-09 2004-01-08 2004-07-09 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2007-07-09 2008-01-08 2008-07-09 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag