Integrator with sampling stage

Claim 1

An integrator with a switched - capacitor sampling stage at the input of said integrator, said sampling stage having a first capacitor having one lead interconnected between first and second alternatingly opened electronic switches and said integrator having at least one amplifier stage having a feedback path containing a feedback capacitor which is connected to an output of said sampling stage, said integrator further comprising: a first polarity commutator interconnected between the output of the sampling stage and an input of a first amplifier stage, said first polarity commutator selectively switching the polarity of a first signal supplied from said sampling stage for forming a first commutator output signal which is supplied to said input of a first amplifier stage, the polarity of said first commutator output signal being the same as or the opposite of the polarity of said first signal depending on the switching state of said first polarity commutator; a second commutator connected to an output of at least one of said amplifier stages for selectively switching the polarity of an amplifier output signal appearing at the output of said one of said amplifier stages, said amplifier output signal being derived from said first commutator output signal through said first amplifier stage and any following amplifier stages including said one of said amplifier stages, said amplifier output signal being transformed by said second polarity commutator for forming a second commutator output signal, the polarity of said second commutator output signal being the same as or opposite the polarity of said amplifier output signal depending on the switching state of said second polarity commutator; said feedback path being connected to an output of said second polarity commutator for supplying said second commutator output signal to said feedback capacitor; and a clock means connected to said first and second electronic switches and to said first and second polarity commutators for alternatingly opening and closing said first and second switches for forming a polarity of said first signals, and for operating said first and second polarity commutators for switching the polarities of said first signals and said amplifier output signals derived therefrom for mutually compensating the influences of said first and second polarity commutators on said second commutator output signals, said second commutator output signals being summed by said feedback capacitor for forming an output signal for said integrator such that noise voltages from said first amplifier stage have respective repeatedly switched polarities depending on the sequence of switching states of said second polarity commutator, thereby being substracted from each other by said feedback capacitor so as to be suppressed.