Planarized interlayer insulating film formed of stacked BPSG film and ozone-teos NSG film in semiconductor device and method for forming the same

Claim 1

A method for manufacturing a semiconductor device, comprising the steps of: forming a diffusion layer and a polysilicon wiring conductor on a silicon substrate surface; forming a non-doped insulating film on surfaces of said diffusion layer and said polysilicon wiring conductor, respectively; forming, on said non-doped insulating film, a BPSG film having a thickness of not less than 50 nm but not greater than 200 nm; performing a first heat-treatment on said BPSG film; forming, on said BPSG film, a non-doped silicon oxide film by a chemical vapor deposition process using ozone and tetrethoxysilane; performing a second heat-treatment on said non-doped silicon oxide film; forming an insulative dummy layer on a surface of said non-doped silicon oxide film; performing an etching-back treatment until said insulative dummy layer is completely removed, so that a surface of said non-doped silicon oxide film is planarized; forming openings through said non-doped insulating film, said BPSG film, and said non-doped silicon oxide film so as to reach said diffusion layer and said polysilicon wiring conductor, respectively; and forming an upper level wiring conductor composed of a metal film on said planarized non-doped silicon oxide film, wherein said upper level wiring conductor is in contact with said diffusion layer and said polysilicon wiring conductor through said openings, respectively.

Claim 2

A method for manufacturing a semiconductor device, comprising the steps of: forming a diffusion layer and a polysilicon wiring conductor on a silicon substrate surface; forming a non-doped insulating film on surfaces of said diffusion layer and said polysilicon wiring conductor, respectively; forming, on said non-doped insulating film, a BPSG film having a thickness of not less than 50 nm but not greater than 200 nm; performing a first heat-treatment on said BPSG film; forming, on said BPSG film, a non-doped silicon oxide film by a chemical vapor deposition process using ozone and tetrethoxysilane; performing a second heat-treatment on said non-doped silicon oxide film; forming an insulative dummy layer on a surface of said non-doped silicon oxide film; performing an etching-back treatment until said insulative dummy layer is completely removed, so that a surface of said non-doped silicon oxide film is planarized; forming openings through said non-doped insulating film, said BPSG film, and said non-doped silicon oxide film so as to reach said diffusion layer and said polysilicon wiring conductor, respectively; and forming an upper level wiring conductor composed of a metal film on said planarized non-doped silicon oxide film, wherein said upper level wiring conductor is in contact with said diffusion layer and said polysilicon wiring conductor through said openings, respectively.

Claim 7

A method for manufacturing a semiconductor device, comprising the steps of: forming a lower level wiring conductor layer on a silicon substrate surface, said lower level wiring conductor including a diffusion layer and a polysilicon wiring conductor; forming a non-doped insulating film on surfaces of said diffusion layer and said polysilicon wiring conductor; forming an opening through said non-doped insulating film at a location of said diffusion layer to expose a portion thereof; forming a silicide wiring conductor on a portion of said non-doped insulating film and in said opening such that said silicide wiring conductor contacts said portion of said diffusion layer; forming, on a portion of said non-doped insulating film and on said silicide wiring conductor, a first BPSG film having a thickness of not less than 50 nm but not greater than 200 nm; performing a first heat-treatment on said first BPSG film; forming, on said first BPSG film, a non-doped silicon oxide film by a chemical vapor deposition process using ozone and tetrethoxysilane; performing a second heat-treatment on said non-doped silicon oxide film; forming an insulative dummy layer on a surface of said non-doped silicon oxide film; performing an etching-back treatment until said insulative dummy layer is completely removed, so that a surface of said non-doped silicon oxide film is planarized; forming a second BPSG on said non-doped silicon oxide film after said etching-back treatment.

Claim 8

A method for manufacturing a semiconductor device, comprising the steps of: forming a lower level wiring conductor layer on a silicon substrate surface, said lower level wiring conductor including a diffusion layer and a polysilicon wiring conductor; forming a non-doped insulating film on surfaces of said diffusion layer and said polysilicon wiring conductor; forming an opening through said non-doped insulating film at a location of said diffusion layer to expose a portion thereof; forming a silicide wiring conductor on a portion of said non-doped insulating film and in said opening such that said silicide wiring conductor contacts said portion of said diffusion layer; forming, on a portion of said non-doped insulating film and on said silicide wiring conductor, a first BPSG film having a thickness of not less than 50 nm but not greater than 200 nm; performing a first heat-treatment on said first BPSG film; forming, on said first BPSG film, a non-doped silicon oxide film by a chemical vapor deposition process using ozone and tetrethoxysilane; performing a second heat-treatment on said non-doped silicon oxide film; forming an insulative dummy layer on a surface of said non-doped silicon oxide film; performing an etching-back treatment until said insulative dummy layer is completely removed, so that a surface of said non-doped silicon oxide film is planarized; forming a second BPSG on said non-doped silicon oxide film after said etching-back treatment.