US5326989A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Semiconductor device having thin film transistor and method of manufacturing the same
Assignee: Renesas Electronics Corp
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Filing: 1992-03-04
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Granted: 1994-07-05
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Expires: 2012-03-04
Abstract
Abstract A thin film transistor is used as a load transistor in a memory cell in a SRAM. A load thin film transistor is arranged on an interlayer insulating layer on the surface of a silicon substrate. A silicon layer in which source/drain regions of the thin film transistor are formed is covered with an oxidation preventing film. An interlayer insulating layer which is to be subject to high temperature reflow processing is formed on the surface of the oxidation preventing film. The oxidation preventing film is formed of polycrystalline silicon, amorphous silicon, silicon nitride, or the like and formed on the silicon layer in the thin film transistor directly or through an insulating layer to cover the surface of the silicon layer.
Inventors
- 👤 Takeo Muragishi
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 12:31
CPC Classifications
H; H10; H10B; H10B10/00; H10B10/12; H10B10/125; H10D; H10D84/00; H10D84/01; H10D84/02; H10D84/03; H10D84/038; H10D88/00; H10D88/01
Claims Analysis
Total Claims: 10
Claim 1
Independent Claim
137 words
A semiconductor device having a thin film transistor, comprising: a first insulating layer formed on a semiconductor substrate; a thin film transistor including a gate electrode layer and a silicon layer separated from each other by a second insulating layer and formed on the surface of said first insulating layer, said thin film transistor further including a channel region formed in said silicon layer in a position opposite to said gate electrode layer, and a pair of impurity regions formed on the both sides of said channel region; an oxidation preventing film formed over said thin film transistor, said oxidation preventing film arranged for preventing said silicon layer in said thin film transistor from being oxidized by preventing oxygen from passing beneath said oxidation preventing film; and a third insulating layer formed over said oxidation preventing film.
Claim 2
Dependent Claim
137 words
A semiconductor device having a thin film transistor, comprising: a first insulating layer formed on a semiconductor substrate; a thin film transistor including a gate electrode layer and a silicon layer separated from each other by a second insulating layer and formed on the surface of said first insulating layer, said thin film transistor further including a channel region formed in said silicon layer in a position opposite to said gate electrode layer, and a pair of impurity regions formed on the both sides of said channel region; an oxidation preventing film formed over said thin film transistor, said oxidation preventing film arranged for preventing said silicon layer in said thin film transistor from being oxidized by preventing oxygen from passing beneath said oxidation preventing film; and a third insulating layer formed over said oxidation preventing film.
Claim 3
Dependent Claim
44 words
The semiconductor device according to claim 1, wherein said silicon layer includes an interconnection part formed in the same layer as said pair of impurity regions in said thin film transistor, and said oxidation preventing film covers the whole surface of said silicon layer.
Claim 4
Dependent Claim
23 words
The semiconductor device according to claim 1, wherein said oxidation preventing film is formed in contact with the surface of said silicon layer.
Claim 5
Dependent Claim
32 words
The semiconductor device according to claim 1, wherein said oxidation preventing film is formed to cover said silicon layer through a third insulating layer formed on the surface of said silicon layer.
Claim 6
Dependent Claim
37 words
The semiconductor device according to claim 1, wherein said oxidation preventing film includes a film formed of at least one material selected from the group consisting of polycrystalline silicon, amorphous silicon, silicon nitride, and refractory metal silicide.
Claim 7
Dependent Claim
44 words
The semiconductor device according to claim 1, wherein said gate electrode of said thin film transistor is formed on the surface of said first insulating layer, and a silicon layer above said gate electrode is formed on the surface of said second insulating layer.
Claim 8
Dependent Claim
44 words
The semiconductor device according to claim 2, wherein said silicon layer is formed on the surface of said first insulating layer, and said gate electrode of said thin film transistor is formed on the surface of said silicon layer through said second insulating layer.
Claim 9
Dependent Claim
20 words
The semiconductor device according to claim 6, wherein said oxidation preventing film covers the whole surface of said silicon layer.
Claim 10
Dependent Claim
26 words
The semiconductor device according to claim 7, wherein said oxidation preventing film covers the surface of said silicon layer and the surface of said gate electrode.
References Cited (Backward Citations)
JPH01125978A
Cited
JPH01181569A
Cited
JPH02260462A
Cited
US5041888A
Cited
US5130772A
Cited
EP0465170A2
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
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| 3.5 Years (Year 4) | 1997-07-04 | 1998-01-03 | 1998-07-05 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2001-07-04 | 2002-01-03 | 2002-07-05 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2005-07-04 | 2006-01-03 | 2006-07-05 | $7700.00 | Window Closed / Lapsed |