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US5489903A
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Digital to analog conversion using non-uniform sample rates
Assignee: Analog Devices Inc
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Filing: 1995-01-17
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Granted: 1996-02-06
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Expires: 2015-01-17
Abstract
Abstract A method and apparatus for digital to analog conversion using sigma-delta modulation of the temporal spacing between digital samples. The method and apparatus of the present invention provides for sigma-delta modulation of the time base such that errors produced by non-uniform sampling are frequency-shaped to a region (i.e., shifted to higher frequencies) where they can be removed by conventional filtering techniques. In one embodiment, the digital data is interpolated by a fixed ratio and then decimated under control of a sigma-delta modulated frequency selection signal that represents, on average, the data rate of the incoming digital data stream. The frequency signal selection number is modulated using an n-th order m-bit sigma-delta modulator. Data thus emerges from the interpolation/decimation process at the clock rate of the n-th order m-bit sigma-delta modulator. The method and apparatus converts the data rate of the incoming digital data stream to the data rate of the n-th order m-bit sigma-delta modulator.
Inventors
- 👤 James Wilson
- 👤 Ronald A. Cellini
- 👤 James M. Sobol
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-25 19:10
CPC Classifications
H; H03; H03H; H03H17/00; H03H17/02; H03H17/06; H03H17/0614; H03H17/0621; H03H17/0628; H03L; H03L7/00; H03L7/06; H03L7/08; H03L7/085; H03L7/093; H03L7/099; H03L7/0991; H03L7/0992; H03M; H03M3/00; H03M3/30; H03M3/322; H03M3/368; H03M3/37; H03M3/372; H03L2207/00; H03L2207/50; H03M3/50
Claims Analysis
Total Claims: 25
Claim 1
Independent Claim
130 words
A digital to analog converter system, comprising: interpolation means for receiving a digital signal having a first data rate and for supplying a digital signal having an increased data rate; decimation means, coupled to the interpolation means, for decimating the digital signal having the increased data rate to provide a digital signal having a second data rate; modulator means, coupled to and controlling the decimation means, for providing a modulated output signal representative of the first data rate and for controlling the decimation means to provide the digital signal having the second data rate; and digital to analog conversion means, coupled to and receiving the digital signal having the second data rate from the decimation means, for converting the digital signal having the second data rate to an analog signal.
Claim 2
Dependent Claim
130 words
A digital to analog converter system, comprising: interpolation means for receiving a digital signal having a first data rate and for supplying a digital signal having an increased data rate; decimation means, coupled to the interpolation means, for decimating the digital signal having the increased data rate to provide a digital signal having a second data rate; modulator means, coupled to and controlling the decimation means, for providing a modulated output signal representative of the first data rate and for controlling the decimation means to provide the digital signal having the second data rate; and digital to analog conversion means, coupled to and receiving the digital signal having the second data rate from the decimation means, for converting the digital signal having the second data rate to an analog signal.
Claim 3
Dependent Claim
17 words
The digital to analog converter system of claim 1, wherein the modulator means comprises a sigma-delta modulator.
Claim 4
Dependent Claim
58 words
The digital to analog converter system of claim 1, further comprising: phase locked loop means, coupled to the sigma-delta modulator means, for receiving a signal representative of the first data rate, locking to the signal, and providing a control signal to the sigma-delta modulator means that controls the sigma-delta modulator means to provide the sigma-delta modulated output signal.
Claim 5
Dependent Claim
18 words
The digital to analog converter system of claim 2, wherein the modulated output signal is a multi-bit code.
Claim 6
Dependent Claim
21 words
The digital to analog converter system of claim 2, wherein the sigma-delta modulator is an n th -order modulator wherein n≧1.
Claim 7
Dependent Claim
25 words
The digital to analog converter system of claim 2, wherein the sigma-delta modulator modulates a sampling frequency select signal representative of the first data rate.
Claim 8
Dependent Claim
60 words
The digital to analog converter system of claim 6, further comprising a memory means for storing a plurality of frequency selection numbers representative of the first data rate and means for selecting one of the frequency selection numbers in response to a selection signal and for providing the selected number to the sigma-delta modulator as the sampling frequency select signal.
Claim 9
Dependent Claim
26 words
The digital to analog converter system of claim 6, wherein the interpolation means interpolates the digital signal having the first data rate by a fixed ratio.
Claim 10
Dependent Claim
42 words
The digital to analog converter system of claim 8, wherein the decimation means decimates the digital signal having the increased data rate by a ratio determined by the sampling frequency select signal to provide the digital signal having the second data rate.
Claim 11
Dependent Claim
38 words
The digital to analog converter system of claim 1, further comprising a filter means, coupled between the interpolation means and the decimation means, for filtering out noise and images of the digital signal having the first data rate.
Claim 12
Dependent Claim
22 words
The digital to analog converter system of claim 1, wherein the digital to analog converter is a sigma-delta digital to analog converter.
Claim 13
Dependent Claim
66 words
A digital to analog converter system, comprising: an interpolator; a decimator having an input electrically coupled to an output of the interpolator; a modulator electrically coupled to a control input of the decimator and providing a temporally noise-shaped control signal that controls a decimation ratio provided by the decimator; and a digital to analog converter having an input electrically coupled to an output of the decimator.
Claim 14
Dependent Claim
66 words
A digital to analog converter system, comprising: an interpolator; a decimator having an input electrically coupled to an output of the interpolator; a modulator electrically coupled to a control input of the decimator and providing a temporally noise-shaped control signal that controls a decimation ratio provided by the decimator; and a digital to analog converter having an input electrically coupled to an output of the decimator.
Claim 15
Dependent Claim
22 words
The digital to analog converter system of claim 12, wherein the digital to analog converter is a sigma-delta digital to analog converter.
Claim 16
Independent Claim
95 words
A method of converting a digital signal to an analog signal, comprising the steps of: receiving a digital signal having a first data rate; modulating a control signal to provide a modulated output signal representative of the first data rate; increasing the first data rate to provide a digital signal having an increased data rate; decimating the digital signal having the increased data rate in response to the modulated output signal to provide a digital signal having a second data rate; and converting the digital signal having the second data rate to an analog signal.
Claim 17
Independent Claim
95 words
A method of converting a digital signal to an analog signal, comprising the steps of: receiving a digital signal having a first data rate; modulating a control signal to provide a modulated output signal representative of the first data rate; increasing the first data rate to provide a digital signal having an increased data rate; decimating the digital signal having the increased data rate in response to the modulated output signal to provide a digital signal having a second data rate; and converting the digital signal having the second data rate to an analog signal.
Claim 18
Dependent Claim
20 words
The method of claim 14, wherein the step of modulating a control signal further comprises sigma-delta modulating the control signal.
Claim 19
Dependent Claim
25 words
The method of claim 15, further comprising a step of filtering the digital signal having the increased data rate prior to the step of decimating.
Claim 20
Dependent Claim
24 words
The method of claim 16, wherein the step of increasing the first data rate includes increasing the first data rate by a fixed ratio.
Claim 21
Dependent Claim
37 words
The method of claim 17, wherein the step of decimating the digital signal having the increased data rate includes decimating the digital signal having the increased data rate by a ratio determined by the modulated output signal.
Claim 22
Dependent Claim
34 words
The method of claim 14, wherein the step of converting the digital signal to an analog signal includes the step of sigma-delta modulating a magnitude of the digital signal having the second data rate.
Claim 23
Independent Claim
88 words
A method of converting a digital signal to an analog signal, comprising the steps of: receiving a digital signal having a first data rate; increasing the first data rate by a fixed ratio to provide a digital signal having an increased data rate; decimating the digital signal having the increased data rate by a variable ratio in response to a modulated control signal to provide a temporally noise-shaped digital signal having a second data rate; and converting the digital signal having the second data to an analog signal.
Claim 24
Independent Claim
88 words
A method of converting a digital signal to an analog signal, comprising the steps of: receiving a digital signal having a first data rate; increasing the first data rate by a fixed ratio to provide a digital signal having an increased data rate; decimating the digital signal having the increased data rate by a variable ratio in response to a modulated control signal to provide a temporally noise-shaped digital signal having a second data rate; and converting the digital signal having the second data to an analog signal.
Claim 25
Dependent Claim
34 words
The method of claim 20, wherein the step of converting the digital signal to an analog signal includes the step of sigma-delta modulating a magnitude of the digital signal having the second data rate.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1999-02-05 | 1999-08-07 | 2000-02-06 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2003-02-05 | 2003-08-07 | 2004-02-06 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2007-02-05 | 2007-08-07 | 2008-02-06 | $7700.00 | Window Closed / Lapsed |