US5489556A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Method for the fabrication of electrostatic microswitches
Assignee: United Microelectronics Corp
•
Filing: 1994-06-29
•
Granted: 1996-02-06
•
Expires: 2014-06-29
Abstract
Abstract A method for fabricating an electrostatic microswitch has the steps of depositing a silicon nitride layer over a silicon substrate with an opening therethrough to expose the planned sacrificial layer region; oxidation to form a silicon dioxide sacrificial layer; phosphorus ion implantation into the sacrificial layer; forming a phosphorus-doped polysilicon microbeam of the microswitch and its electrode contacts; lateral etching all of the silicon dioxide sacrificial layer in buffered hydrofluoric acid to form an air gap between the microbeam and the substrate; rinsing the structure in DI water, and then in methanol; and drying the structure by a warm nitrogen flow.
Inventors
- 👤 Zhijian Li
- 👤 Xiqing Sun
- 👤 Litian Liu
- 👤 Xinyu Zheng
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-08 16:35
CPC Classifications
H; H01; H01H; H01H59/00; H01H59/0009
Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
194 words
A method for fabricating an electrostatic microswitch comprising the steps of: (a) providing a silicon substrate having a certain conductivity type; (b) depositing a silicon nitride layer over said silicon substrate with an opening therethrough to expose a portion of said silicon substrate; (c) oxidizing said exposed silicon substrate surface to form a silicon dioxide sacrificial layer; (d) ion implantation of a dopant into said silicon dioxide sacrificial layer to increase its lateral etch rate; (e) depositing a layer of phosphorus-doped polysilicon over said silicon nitride and said silicon dioxide sacrificial layer; (f) patterning said phosphorus-doped polysilicon layer by lithography and etching to form a polysilicon microbeam of said electrostatic microswitch; (g) forming at least one electrode contact on said polysilicon microbeam; (h) forming a resist mask over said electrode contact to protect the electrode contact pattern from etching during a lateral etching step; (i) laterally etching all of said silicon dioxide sacrificial layer in buffered hydrofluoric acid to form an air gap between said polysilicon microbeam and said silicon substrate; (j) rinsing said microswitch structure in DI water, and then in methanol; and (k) drying said microswitch structure by a warm nitrogen flow.
Claim 2
Independent Claim
194 words
A method for fabricating an electrostatic microswitch comprising the steps of: (a) providing a silicon substrate having a certain conductivity type; (b) depositing a silicon nitride layer over said silicon substrate with an opening therethrough to expose a portion of said silicon substrate; (c) oxidizing said exposed silicon substrate surface to form a silicon dioxide sacrificial layer; (d) ion implantation of a dopant into said silicon dioxide sacrificial layer to increase its lateral etch rate; (e) depositing a layer of phosphorus-doped polysilicon over said silicon nitride and said silicon dioxide sacrificial layer; (f) patterning said phosphorus-doped polysilicon layer by lithography and etching to form a polysilicon microbeam of said electrostatic microswitch; (g) forming at least one electrode contact on said polysilicon microbeam; (h) forming a resist mask over said electrode contact to protect the electrode contact pattern from etching during a lateral etching step; (i) laterally etching all of said silicon dioxide sacrificial layer in buffered hydrofluoric acid to form an air gap between said polysilicon microbeam and said silicon substrate; (j) rinsing said microswitch structure in DI water, and then in methanol; and (k) drying said microswitch structure by a warm nitrogen flow.
Claim 3
Dependent Claim
40 words
The method of claim 1, wherein the step (d) includes the step of ion implantation of phosphorus ions into said silicon dioxide sacrificial layer with a dose of about 3×10 15 cm -2 and implant energy of about 150 KeV.
Claim 4
Dependent Claim
47 words
The method of claim 2, wherein the step (e) includes the steps of depositing said phosphorus-doped polysilicon layer by LPCVD at about 750° C., and rapid thermal annealing said phosphorus-doped polysilicon layer at about 1100° C. for about 9 minutes to reduce the intrinsic mechanical stress therein.
Claim 5
Dependent Claim
19 words
The method of claim 3, wherein said phosphorus-doped polysilicon microbeam has a sheet resistance of about 28Ω per square.
Claim 6
Dependent Claim
13 words
The method of claim 4, wherein said resist mask is a negative photoresist.
Claim 7
Dependent Claim
30 words
The method of claim 5, wherein said polysilicon microbeam preferably has a length between about 50-250 micrometers, a width between about 25-100 micrometers, and a thickness of about 1 micrometer.
Claim 8
Dependent Claim
24 words
The method of claim 6, wherein said silicon dioxide sacrificial layer formed in the step (c) preferably has a thickness of about 1.1 micrometers.
Claim 9
Dependent Claim
22 words
The method of claim 7, wherein said silicon nitride formed in the step (b) preferably has a thickness of about 3500 angstroms.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1999-02-05 | 1999-08-07 | 2000-02-06 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2003-02-05 | 2003-08-07 | 2004-02-06 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2007-02-05 | 2007-08-07 | 2008-02-06 | $7700.00 | Window Closed / Lapsed |