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US5479047A Expired / Lapsed US ⏱️ 0.0 years remaining

Self-aligned bipolar transistor with very thin dielectric layer interfacing between poly and active area

Assignee: Raytheon Co
•
Filing: 1993-04-02
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Granted: 1995-12-26
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Expires: 2013-04-02
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Abstract

Abstract A modification of the self-aligned double poly fabrication process for bipolar transistors employs a thin sacrificial dielectric film to protect the wafer surface during the etching of an emitter opening through an overlying polysilicon contact layer. The sacrificial layer, which is preferably silicon dioxide for a silicon wafer, is thick enough to serve as an etch stop but thin enough to permit dopant from the polysilicon contact to be driven-in through the film to form an extrinsic base region. The dielectric film is left in place under the base contact polysilicon, but removed from the emitter area. It is preferably about 10-20 Angstroms thick when implemented as a silicon dioxide film. With this material system, the extrinsic base drive-in is preferably performed either by a rapid isothermal anneal at about 1,000° C. for about 30-40 seconds, or in a furnace at about 975° C. for about 10 minutes.

Inventors

  • 👤 Kuan-Yang Liao
  • 👤 Maw-Rong Chin

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-01 18:13
CPC Classifications
H; H10; H10D; H10D10/00; H10D10/01; H10D10/051; H10D10/40; H10D10/421; H10P; H10P32/00; H10P32/10; H10P32/14; H10P32/1408; H10P32/141; H10P32/1412; H10P32/17; H10P32/171

Claims Analysis

Total Claims: 7
Claim 1
Independent Claim 170 words
A bipolar transistor structure, comprising: a semiconductor substrate having an active area; a doped emitter having outer edges and a doped collector in said active area; a doped intrinsic base below said emitter; a doped extrinsic base lateral to said intrinsic base; an emitter contact contacting a portion of the upper surface of said emitter that is spaced inward from the emitter's outer edges; dielectric walls extending upward from said emitter lateral to said emitter contact, said dielectric walls having outer surfaces vertically aligned with the emitter's outer edges; a doped contact layer over said extrinsic base, said doped contact layer extending to said dielectric walls on either side of the emitter and having inner edges vertically aligned with the emitter's outer edges; a thin dielectric film about 10-20 Angstroms thick between said extrinsic base and said contact layer, said dielectric film extending to said dielectric walls on either side of the emitter and having inner edges vertically aligned with the emitter's outer edges; and collector and extrinsic base contacts.
Claim 2
Dependent Claim 170 words
A bipolar transistor structure, comprising: a semiconductor substrate having an active area; a doped emitter having outer edges and a doped collector in said active area; a doped intrinsic base below said emitter; a doped extrinsic base lateral to said intrinsic base; an emitter contact contacting a portion of the upper surface of said emitter that is spaced inward from the emitter's outer edges; dielectric walls extending upward from said emitter lateral to said emitter contact, said dielectric walls having outer surfaces vertically aligned with the emitter's outer edges; a doped contact layer over said extrinsic base, said doped contact layer extending to said dielectric walls on either side of the emitter and having inner edges vertically aligned with the emitter's outer edges; a thin dielectric film about 10-20 Angstroms thick between said extrinsic base and said contact layer, said dielectric film extending to said dielectric walls on either side of the emitter and having inner edges vertically aligned with the emitter's outer edges; and collector and extrinsic base contacts.
Claim 3
Dependent Claim 18 words
The bipolar transistor structure of claim 1, wherein said dielectric film comprises an oxide of the substrate material.
Claim 4
Dependent Claim 70 words
A bipolar transistor structure, comprising: a semiconductor substrate having an active area; a doped emitter and a doped collector in said active area; a doped intrinsic base below said emitter; a doped extrinsic base lateral to said intrinsic base; a doped contact layer over said extrinsic base; a dielectric film about 10-20 Angstroms thick between said extrinsic base and said doped contact layer; and emitter, collector and extrinsic base contacts.
Claim 5
Dependent Claim 70 words
A bipolar transistor structure, comprising: a semiconductor substrate having an active area; a doped emitter and a doped collector in said active area; a doped intrinsic base below said emitter; a doped extrinsic base lateral to said intrinsic base; a doped contact layer over said extrinsic base; a dielectric film about 10-20 Angstroms thick between said extrinsic base and said doped contact layer; and emitter, collector and extrinsic base contacts.
Claim 6
Dependent Claim 18 words
The bipolar transistor structure of claim 3, wherein said dielectric film comprises an oxide of the substrate material.
Claim 7
Dependent Claim 36 words
The bipolar transistor structure of claim 3, further comprising a complementary bipolar transistor on the same substrate with a similar structure to said first transistor but with dopings that are complementary to the first transistor dopings.

References Cited (Backward Citations)

US4157269A Cited
US4910575A Cited
US4892837A Cited
US5148252A Cited
US5175607A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1998-12-25 1999-06-26 1999-12-26 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2002-12-25 2003-06-26 2003-12-26 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2006-12-25 2007-06-26 2007-12-26 $7700.00 Window Closed / Lapsed

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