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US5476799A Expired / Lapsed US ⏱️ 0.0 years remaining

Process for preparing semiconductor device using a tunnel oxidized layer

Assignee: Canon Inc
•
Filing: 1993-05-27
•
Granted: 1995-12-19
•
Expires: 2013-05-27
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Abstract

Abstract A process for preparing a semiconductor device forms an insulating thin film capable of tunnelling phenomenon of carriers on a semiconductor substrate and forms a polycrystalline semiconductor layer on the thin film. An impurity is injected to the surface of the polycrystalline semiconductor layer, the diffusion coefficient to the thin film being smaller than that to the polycrystalline semiconductor layer. The process effects a first heat treatment at a temperature of 800 DEG C. or less to diffuse the impurity injected into the polycrystalline semiconductor layer in the polycrystalline semiconductor layer, thereby forming a uniform or substantially uniform impurity containing region at least at the thin film side of the polycrystalline semiconductor layer, and, effects a second heat treatment the temperature of which is 950 DEG C. or less and higher than the temperature of the first heat treatment to diffuse the impurity present in the polycrystalline semiconductor layer into the semiconductor substrate through the thin film, thereby forming a diffused layer.

Inventors

  • 👤 Masaru Sakamoto
  • 👤 Masakazu Morishita
  • 👤 Shigeru Nishimura

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-09 04:19
CPC Classifications
H; H10; H10P; H10P14/00; H10P14/20; H10P14/24; H10D; H10D64/00; H10D64/01; H10D64/011; H10D64/0111; H10D64/0113; H10P14/29; H10P14/2901; H10P14/2902; H10P14/2905; H10P14/2926; H10P14/32; H10P14/3202; H10P14/3204; H10P14/3211; H10P14/3238; H10P14/3242; H10P14/3244; H10P14/3248; H10P14/34; H10P14/3402; H10P14/3404; H10P14/3411; H10P14/38; H10P14/3802; H10P32/00; H10P32/10; H10P32/14; H10P32/1408; H10P32/1414; H10P32/17; H10P32/171; H10P32/30; H10P32/302; Y; Y10; Y10S; Y10S148/00; Y10S148/123; Y10S438/00; Y10S438/914; Y10S438/923

Claims Analysis

Total Claims: 13
Claim 1
Independent Claim 159 words
A process for preparing a semiconductor device which comprises: forming an insulating thin film capable of tunnelling phenomenon of carriers on a semiconductor substrate; forming a polycrystalline semiconductor layer on the thin film; injecting to the surface of the polycrystalline semiconductor layer an impurity, the diffusion coefficient to the thin film of which is smaller than that to the polycrystalline semiconductor layer; effecting a first heat treatment at a temperature of 800° C. or less to diffuse the impurity injected into the polycrystalline semiconductor layer into the polycrystalline semiconductor layer, thereby forming a uniform or substantially uniform impurity-containing region at least at the thin film side of the polycrystalline semiconductor layer; and effecting a second heat treatment the temperature of which is 950° C. or less, and higher than the temperature of the first heat treatment, to diffuse the impurity present in the polycrystalline semiconductor layer into the semiconductor substrate through the thin film, thereby forming a diffused layer.
Claim 2
Dependent Claim 159 words
A process for preparing a semiconductor device which comprises: forming an insulating thin film capable of tunnelling phenomenon of carriers on a semiconductor substrate; forming a polycrystalline semiconductor layer on the thin film; injecting to the surface of the polycrystalline semiconductor layer an impurity, the diffusion coefficient to the thin film of which is smaller than that to the polycrystalline semiconductor layer; effecting a first heat treatment at a temperature of 800° C. or less to diffuse the impurity injected into the polycrystalline semiconductor layer into the polycrystalline semiconductor layer, thereby forming a uniform or substantially uniform impurity-containing region at least at the thin film side of the polycrystalline semiconductor layer; and effecting a second heat treatment the temperature of which is 950° C. or less, and higher than the temperature of the first heat treatment, to diffuse the impurity present in the polycrystalline semiconductor layer into the semiconductor substrate through the thin film, thereby forming a diffused layer.
Claim 3
Dependent Claim 29 words
A process for preparing a semiconductor device according to claim 1, wherein the first heat treatment and the second heat treatment are carried out sequentially by continuous temperature elevation.
Claim 4
Dependent Claim 29 words
A process for preparing a semiconductor device according to claim 1, wherein the first heat treatment and the second heat treatment are carried out sequentially by stepwise temperature elevation.
Claim 5
Dependent Claim 21 words
A process for preparing a semiconductor device according to claim 1, wherein the semiconductor substrate comprises a semiconductor material containing Si.
Claim 6
Dependent Claim 24 words
A process for preparing a semiconductor device according to claim 1, wherein the temperature of the first heat treatment is 600° C. or more.
Claim 7
Dependent Claim 31 words
A process for preparing a semiconductor device according to claim 1, wherein the temperature elevation between the first heat treatment and the second heat treatment is made 5° C./min. or higher.
Claim 8
Dependent Claim 19 words
A process for preparing a semiconductor device according to claim 1, wherein the thin film is an oxidized film.
Claim 9
Dependent Claim 32 words
A process for preparing a semiconductor device according to claim 1, wherein the thin film is at least one material selected from Si 3 N 4 , SiC and SiO 2 .
Claim 10
Dependent Claim 24 words
A process for preparing a semiconductor device according to claim 1, wherein the temperature of the second heat treatment is 800° C. or more.
Claim 11
Dependent Claim 37 words
A process for preparing a semiconductor device according to claim 1, wherein the temperature of the first heat treatment is 600° C. or more and the temperature of the second heat treatment is 800° C. or more.
Claim 12
Dependent Claim 19 words
A process for preparing a semiconductor device according to claim 1, wherein the diffused layer is a contact region.
Claim 13
Dependent Claim 19 words
A process for preparing a semiconductor device according to claim 1, wherein the diffused layer comprises an emitter region.

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1998-12-18 1999-06-19 1999-12-19 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2002-12-18 2003-06-19 2003-12-19 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2006-12-18 2007-06-19 2007-12-19 $7700.00 Window Closed / Lapsed

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