US5470768A
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Method for fabricating a thin-film transistor
Assignee: Sharp Corp
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Filing: 1993-08-05
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Granted: 1995-11-28
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Expires: 2013-08-05
Abstract
Abstract To form a contact layer on source and drain electrodes of a stagger-type TFT, a conductive material is selectively sticked to the surface of the source and drain electrodes and a contact layer is selectively deposited by using the conductive material as growth species to form an active semiconductor layer on the contact layer. For an inverted-stagger-type TFT, a conductive material is selectively deposited on the surface of a contact layer to use the selectively deposited conductive material as source and drain electrodes so that patterning is unnecessary. To selectively deposit a contact layer of a TFT by alternately repeating etching and deposition, the temperature for the etching is set to 200° C. or lower. A contaminated layer on the surface of a semiconductor film serving as an active semiconductor layer and contact layer of a TFT is removed by plasma at the temperature of 200° C. or lower. For a stagger-type thin-film transistor, the hydrogen or halogen content of an insulating film serving as the substrate of source and drain electrodes is increased. For an inverted-stagger thin-film transistor, the hydrogen or halogen content of an insulating film serving as a channel protective film is increased. Thus, the etching rate of the surfaces of these insulating films by plasma increases.
Inventors
- 👤 Ken-ichi Yanai
- 👤 Tsutomu Tanaka
- 👤 Koji Ohgata
- 👤 Yutaka Takizawa
- 👤 Ken-ichi Oki
- 👤 Takuya Hirano
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-07 18:45
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/01; H10D30/021; H10D30/031; H10D30/0321; H10D30/0312; H10D30/0314; H10D30/0316; H10D30/60; H10D30/67; H10D30/6704; H10D30/6713; H10D30/6729; H10D30/6737; H10D30/674; H10D30/6741; H10D30/6743; H10D30/6757; H10D30/6758; H10D64/00; H10D64/01; H10D64/011; H10D64/0111; H10D64/0113; H10P; H10P14/00; H10P14/20; H10P14/24; H10P14/29; H10P14/2901; H10P14/2921; H10P14/2922; H10P14/34; H10P14/3402; H10P14/3404; H10P14/3411; H10P14/3438; H10P14/3441; H10P14/3442; G; G02; G02F; G02F1/00; G02F1/01; G02F1/13; G02F1/133; G02F1/136; G02F1/1362; G02F1/1368
Claims Analysis
Total Claims: 31
Claim 1
Independent Claim
122 words
A method for fabricating a thin-film transistor, comprising the steps of: forming electrodes in at least a source region and a drain region on a substrate insulator; selectively applying a conductive material only to the electrodes; selectively forming an impurity-contained semiconductor film on the electrodes by alternately repeating etching and deposition using a difference of deposition rate due to a deposition base; forming an active semiconductor layer for covering the impurity-contained semiconductor film and the substrate insulator; forming a gate insulating film on the active semiconductor layer; forming a conductive film for a gate on the gate insulating film; and patterning the conductive film, the gate insulating film, the active semiconductor layer, and the impurity-contained semiconductor film to define a gate region.
Claim 2
Independent Claim
122 words
A method for fabricating a thin-film transistor, comprising the steps of: forming electrodes in at least a source region and a drain region on a substrate insulator; selectively applying a conductive material only to the electrodes; selectively forming an impurity-contained semiconductor film on the electrodes by alternately repeating etching and deposition using a difference of deposition rate due to a deposition base; forming an active semiconductor layer for covering the impurity-contained semiconductor film and the substrate insulator; forming a gate insulating film on the active semiconductor layer; forming a conductive film for a gate on the gate insulating film; and patterning the conductive film, the gate insulating film, the active semiconductor layer, and the impurity-contained semiconductor film to define a gate region.
Claim 3
Dependent Claim
21 words
A method for fabricating a thin-film transistor according to claim 1, wherein the conductive material is selectively applied through plasma CVD.
Claim 4
Dependent Claim
25 words
A method for fabricating a thin-film transistor according to claim 1, wherein the conductive material contains tungsten, molybdenum, titanium, tantalum, aluminum, or refractory metal silicide.
Claim 5
Dependent Claim
42 words
A method for fabricating a thin-film transistor according to claim 1, wherein the electrodes on the substrate insulator are exposed to plasma under a low pressure and thereafter the conductive material is continuously applied to the electrodes without breaking the low pressure.
Claim 6
Dependent Claim
37 words
A method for fabricating a thin-film transistor according to claim 1, wherein the electrodes are exposed to hydrogen or halogen plasma at a temperature of no more than 200 before applying the conductive material to the electrodes.
Claim 7
Dependent Claim
52 words
A method for fabricating a thin-film transistor according to claim 1, wherein a material gas containing a silicon compound and impurities is used for the deposition and at least one of hydrogen, helium, neon, argon, krypton, and xenon is used for etching in the step of selectively forming an impurity-contained semiconductor film.
Claim 8
Dependent Claim
42 words
A method for fabricating a thin-film transistor according to claim 1, wherein the etching in the step of selectively forming an impurity-contained semiconductor film is performed through plasma treatment containing hydrogen or halogen at a temperature of no more than 200° C.
Claim 9
Dependent Claim
47 words
A method for fabricating a thin-film transistor according to claim 1, wherein a discharge electrode for supporting the substrate insulator is grounded during the deposition and the discharge electrode is connected to one of a radio-frequency power supply and a direct current power supply during the etching.
Claim 10
Dependent Claim
68 words
A method for fabricating a thin-film transistor according to claim 1, wherein the step of selectively forming an impurity-contained semiconductor film on the electrodes by alternately repeating etching and deposition using a difference of deposition rate due to a deposition base further comprises a step of etching a surface of the impurity-contained semiconductor film with hydrogen or halogen plasma at a temperature of no more than 200° C.
Claim 11
Dependent Claim
24 words
A method for fabricating a thin-film transistor according to claim 9, wherein the surface of the impurity-contained semiconductor film is etched at room temperature.
Claim 12
Dependent Claim
51 words
A method for fabricating a thin-film transistor according to claim 9, wherein the step of etching the surface of the impurity-contained semiconductor film and the step of forming the active semiconductor layer are performed separately in two reaction chambers connected to each other by a connection passage under a low pressure.
Claim 13
Dependent Claim
38 words
A method for fabricating a thin-film transistor according to claim 1, wherein steps from selective applying of a conductive material to selectively forming of an impurity-contained semiconductor film are continuously performed without being exposed to an outer atmosphere.
Claim 14
Dependent Claim
38 words
A method for fabricating a thin-film transistor according to claim 1, wherein steps from selectively forming an impurity-contained semiconductor film to forming a gate insulating film on the active semiconductor layer are continuously performed under a low pressure.
Claim 15
Dependent Claim
27 words
A method for fabricating a thin-film transistor according to claim 1, wherein each of the electrodes on the substrate insulator comprises one of metal, oxide, and nitride.
Claim 16
Dependent Claim
34 words
A method for fabricating a thin-film transistor according to claim 14, wherein each of the electrodes on the substrate insulator comprises one of indium-tin oxide, tin oxide, zinc oxide, nickel oxide, and titanium nitride.
Claim 17
Dependent Claim
70 words
A method for fabricating a thin-film transistor according to claim 1, wherein a heating temperature of the substrate insulator for the etching is no more than 200° C. in the step of selectively forming an impurity-contained semiconductor film, and a heating temperature of the substrate insulator for the deposition is at least equal to the heating temperature for the etching in the step of selectively forming an impurity-contained semiconductor film.
Claim 18
Dependent Claim
50 words
A method for fabricating a thin-film transistor according to claim 1, wherein hydrogen or halogen is prevented from entering into the substrate insulator from outside of the substrate insulator by increasing a content of the hydrogen or the halogen, respectively, in at least an upper portion of the substrate insulator.
Claim 19
Dependent Claim
34 words
A method for fabricating a thin-film transistor according to claim 1, wherein at least an upper portion of the substrate insulator comprises silicon nitride formed at a deposition temperature no greater than 220° C.
Claim 20
Dependent Claim
35 words
A method for fabricating a thin-film transistor according to claim 1, wherein each of the electrodes comprises a sidewall which is formed into a taper shape in the source region and in the drain region.
Claim 21
Dependent Claim
46 words
A method for fabricating a thin-film transistor according to claim 1, further comprising the step of forming a concave comprising an edge on the substrate insulator in the source region and in the drain region and the step of forming the edge into a taper shape.
Claim 22
Independent Claim
143 words
A method for fabricating a thin-film transistor, said method comprising the steps of: forming electrodes in at least a source region and a drain region on a substrate insulator; selectively dispersing a conductive material to form a small number of active species containing the conductive material only on the electrodes; selectively forming an impurity-contained semiconductor film on the electrodes by alternately repeating etching and deposition using a difference of deposition rate on the substrate insulator and on the electrodes which contain said active species; forming an active semiconductor layer covering the impurity-contained semiconductor film and the substrate insulator; forming a gate insulating film on the active semiconductor layer; forming a conductive layer for a gate on the gate insulating film; and patterning the conductive film, the gate insulating film, the active semiconductor layer, and the impurity-contained semiconductor film to define a gate region.
Claim 23
Independent Claim
143 words
A method for fabricating a thin-film transistor, said method comprising the steps of: forming electrodes in at least a source region and a drain region on a substrate insulator; selectively dispersing a conductive material to form a small number of active species containing the conductive material only on the electrodes; selectively forming an impurity-contained semiconductor film on the electrodes by alternately repeating etching and deposition using a difference of deposition rate on the substrate insulator and on the electrodes which contain said active species; forming an active semiconductor layer covering the impurity-contained semiconductor film and the substrate insulator; forming a gate insulating film on the active semiconductor layer; forming a conductive layer for a gate on the gate insulating film; and patterning the conductive film, the gate insulating film, the active semiconductor layer, and the impurity-contained semiconductor film to define a gate region.
Claim 24
Independent Claim
180 words
A method for fabricating a thin-film transistor, comprising the steps of: forming on a substrate a substrate insulator containing hydrogen or halogen entering from outside of the substrate insulator by increasing a content of the hydrogen or the halogen, respectively; laminating a first conductive film on the substrate insulator; patterning the first conductive film to form electrodes in at least a source region and a drain region; selectively forming an impurity-contained semiconductor film on a surface of each of the electrodes by alternately repeating etching with hydrogen plasma or halogen plasma, respectively, and deposition using a difference of deposition rate due to a deposition base; forming an active semiconductor layer on the substrate insulator and the impurity-contained semiconductor film; laminating an insulating film and a second conductive film in order on the active semiconductor layer; and patterning the the active semiconductor layer, the second conductive film, the insulating film, and the impurity-contained film to form a contact layer comprising the impurity-contained semiconductor film, a gate insulating film comprising the insulting film, and a gate electrode comprising the second conductive film.
Claim 25
Independent Claim
180 words
A method for fabricating a thin-film transistor, comprising the steps of: forming on a substrate a substrate insulator containing hydrogen or halogen entering from outside of the substrate insulator by increasing a content of the hydrogen or the halogen, respectively; laminating a first conductive film on the substrate insulator; patterning the first conductive film to form electrodes in at least a source region and a drain region; selectively forming an impurity-contained semiconductor film on a surface of each of the electrodes by alternately repeating etching with hydrogen plasma or halogen plasma, respectively, and deposition using a difference of deposition rate due to a deposition base; forming an active semiconductor layer on the substrate insulator and the impurity-contained semiconductor film; laminating an insulating film and a second conductive film in order on the active semiconductor layer; and patterning the the active semiconductor layer, the second conductive film, the insulating film, and the impurity-contained film to form a contact layer comprising the impurity-contained semiconductor film, a gate insulating film comprising the insulting film, and a gate electrode comprising the second conductive film.
Claim 26
Dependent Claim
33 words
A method for fabricating a thin-film transistor according to claim 22, wherein at least an upper portion of the substrate insulator comprises silicon nitride chemical-vapor-deposited at a temperature no greater than 220° C.
Claim 27
Dependent Claim
51 words
A method for fabricating a thin-film transistor according to claim 22, wherein each of the electrodes is formed on a surface of the substrate insulator before exposing the surface of the substrate insulator between the source region and the drain region to plasma to clean the surface of the substrate insulator.
Claim 28
Dependent Claim
46 words
A method for fabricating a thin-film transistor according to claim 22, further comprising the step of forming a concave comprising an edge on the substrate insulator in the source region and in the drain region and the step of forming the edge into a taper shape.
Claim 29
Dependent Claim
31 words
A method for fabricating a thin-film transistor according to claim 22, further comprising the step of forming a taper on an edge of each of the electrodes on the substrate insulator.
Claim 30
Dependent Claim
54 words
A method for fabricating a thin-film transistor according to claim 22, wherein an amount of the hydrogen or the halogen entering into the substrate insulator from outside of the substrate insulator is regulated by varying the content of the hydrogen or the halogen, respectively, in at least an upper portion of the substrate insulator.
Claim 31
Dependent Claim
34 words
A method for fabricating a thin-film transistor according to claim 27, wherein at least an upper portion of the substrate insulator comprises silicon nitride formed at a deposition temperature no greater than 220° C.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1998-11-27 | 1999-05-29 | 1999-11-28 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2002-11-27 | 2003-05-29 | 2003-11-28 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2006-11-27 | 2007-05-29 | 2007-11-28 | $7700.00 | Window Closed / Lapsed |