US5466638A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Method of manufacturing a metal interconnect with high resistance to electromigration
Assignee: Mitsubishi Electric Corp
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Filing: 1994-08-16
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Granted: 1995-11-14
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Expires: 2014-08-16
Abstract
Abstract A semiconductor device is provided which includes a conductive layer, an insulating film formed on the surface of the conductive layer, and a conductive metal interconnection layer formed on the insulating film and electrically connected to the conductive layer through a contact hole formed in a predetermine position of the insulating film. The conductive metal interconnection and the surface of the conductive layer are directly joined together and a silicon layer including a single crystal or polycrystalline silicon having a grain size of at least about 10 μm is interposed between the conductive metal interconnection layer and the insulating film. The conductive metal interconnection layer becomes a single crystal or a polycrystal having a grain size of about 10 μm or above under the influence of the crystalline properties of the underlying crystal of the silicon layer. Therefore, in the conductive metal interconnection layer in the entire region including the inside portion of the contact hole, essentially no grain boundaries exist. Thus, electromigration of conductive metal ions is controlled.
Inventors
- 👤 Koji Eguchi
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 17:07
CPC Classifications
H; H10; H10W; H10W20/00; H10W20/40; H10W20/41; H10W20/42; H10W20/01; H10W20/031; H10W20/056; H10W20/425; Y; Y10; Y10S; Y10S438/00; Y10S438/927
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
162 words
A method of manufacturing a semiconductor device, comprising the steps of: providing a conductive layer; depositing an insulating film on a surface of the conductive layer; forming a silicon layer comprising one of polysilicon or amorphous silicon on a surface of the insulating film; forming a contact hole at a selected position through both said silicon layer and said insulating layer so as to expose a portion of the surface of said conductive layer; forming a conductive metal interconnection layer on a surface of said silicon layer including an internal surface of said contact hole, said conductive metal interconnection layer and said silicon layer each being formed according to a pattern; and applying a thermal treatment for forming said silicon layer to be in one of a single crystal form or a polycrystalline form having a grain size of at least 10 μm after the step of forming said silicon layer and before the step of forming said conductive metal interconnection layer.
Claim 2
Independent Claim
162 words
A method of manufacturing a semiconductor device, comprising the steps of: providing a conductive layer; depositing an insulating film on a surface of the conductive layer; forming a silicon layer comprising one of polysilicon or amorphous silicon on a surface of the insulating film; forming a contact hole at a selected position through both said silicon layer and said insulating layer so as to expose a portion of the surface of said conductive layer; forming a conductive metal interconnection layer on a surface of said silicon layer including an internal surface of said contact hole, said conductive metal interconnection layer and said silicon layer each being formed according to a pattern; and applying a thermal treatment for forming said silicon layer to be in one of a single crystal form or a polycrystalline form having a grain size of at least 10 μm after the step of forming said silicon layer and before the step of forming said conductive metal interconnection layer.
Claim 3
Dependent Claim
89 words
The method of manufacturing a semiconductor device according to claim 1, wherein: said silicon layer is formed by depositing a polysilicon on the surface of said insulating film and controlling the thermal treatment to form the polysilicon into one of a single crystal form or said polycrystalline form having grain size of at least 10 μm by maintaining the polysilicon at a temperature in a range from 800° C. to 1200° C. for a selected period corresponding to whether the single crystal form or the polycrystalline form is chosen.
Claim 4
Dependent Claim
60 words
The method of manufacturing a semiconductor device according to claim 1, wherein: said silicon layer is formed by depositing amorphous silicon on a surface of said insulating film, and the thermal treatment is conducted at a temperature in the range 800° C. to 1200° C. for a period in the range extending from several tens of minutes to several hours.
Claim 5
Dependent Claim
66 words
The method of manufacturing a semiconductor device according to claim 1, wherein: said conductive metal interconnection layer is formed by depositing aluminum on a surface of said silicon layer by sputtering, and the thermal treatment comprises the step of heating said conductive layer to a temperature in the range 100° C. to 600° C. while depositing aluminum on the surface of said silicon layer by sputtering.
Claim 6
Dependent Claim
34 words
The method of manufacturing a semiconductor device according to claim 1, wherein: the thermal treatment is conducted after the step of forming said silicon layer and before the step of forming said contact hole.
Claim 7
Dependent Claim
36 words
The method of manufacturing a semiconductor device according to claim 1, wherein: the thermal treatment is conducted after the step of forming said contact hole and before the step of forming said conductive metal interconnection layer.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1998-11-13 | 1999-05-15 | 1999-11-14 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2002-11-13 | 2003-05-15 | 2003-11-14 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2006-11-13 | 2007-05-15 | 2007-11-14 | $7700.00 | Window Closed / Lapsed |