Slow memory refresh in a computer with a limited supply of power

Claim 2

In a computer system with a limited source of power and memory being refreshed using a first clock, an improvement for conserving power in refreshing the memory comprising: suspend mode generation means for generating a suspend signal upon activation of a power suspend mode, the power suspend mode being activated in response to a first event internal to the computer system and a second event external to the computer system; an input/output unit coupled to receive said suspend signal and for generating an interrupt in response thereto; a central processing unit coupled to receive said interrupt and in response thereto for generating a first suspend control bit and a second suspend control bit and for saving current system registers and stack pointers of said computer system to a particular location in said memory in response to said interrupt, said central processing unit coupled to system dynamic memory; wherein said system dynamic memory is a portion of said memory, wherein said input/output unit is coupled to receive said first suspend control bit and is also for generating a power off signal in response thereto; a video interface device coupled to a video dynamic memory wherein said video dynamic memory is a portion of said memory, said video interface device coupled to receive said second suspend control bit; resume mode generation means coupled to the CPU for generating a resume signal upon deactivation of the power suspend mode, the power suspend mode being deactivated in response to a third event internal to the computer system and a fourth event external to the computer system; wherein the input/output unit comprises clock generation means, coupled to the suspend mode generation means and the resume mode generation means, for generating a second clock slower than the first clock, the second clock being fast enough to be used to refresh said system and video dynamic memory without causing a loss of data contained therein; means for refreshing the video dynamic memory and the system dynamic memory using the second clock in response to said second suspend control bit and said power off signal, respectively, to place said memory into a reduced power state; means for disabling the first clock after the suspend signal is received from the suspend mode generation means; means for enabling the first clock after the resume signal is received from the resume mode generation means; and means for refreshing the system dynamic memory and the video dynamic memory using the first clock after the resume signal is received from the resume mode generation means.

Claim 3

The improved computer system of claim 1 wherein said computer system is battery powered.

Claim 4

The improved computer system of claim 1 wherein said system dynamic memory is DRAM and wherein said video dynamic memory is DRAM.

Claim 5

The improved computer system of claim 1 wherein said second event external to the computer system includes a transition of an electrical signal applied to an external circuit pin.

Claim 6

The improved computer system of claim 1 wherein said fourth event external to the computer system includes a transition of an electrical signal applied to an external circuit pin.

Claim 7

The improved computer system of claim 1 further including means for detecting a battery low condition coupled to said suspend mode generation means and wherein said first event internal to the computer system includes detection of said battery low condition.

Claim 8

The improved computer system of claim 1 further including means for detecting a ring detect signal coupled to said resume mode generation means and wherein said fourth event external to the computer system includes receipt of said ring detect signal.

Claim 9

The improved computer system of claim 1 further including an input device and a timer, said timer is reset upon each activation of said input device, said timer is coupled to said suspend mode generation means, and wherein said first event internal to the computer system includes said time-out of said timer.

Claim 10

The improved computer system of claim 1 further including an input device, said resume signal generation means further including means for receiving an input signal generated by said input device upon activation of said input device, and wherein said external to the computer includes receipt of the input signal.

Claim 11

The improved computer system of claim 1 wherein said computer system is housed in a case, said case including a button activated upon closure of said case, said suspend signal generation means further including means for receiving a signal upon activation of said button, and wherein said second event external to the computer system includes receipt of the signal.

Claim 12

The improved computer system of claim 1 wherein said computer system is housed in a case, said case including a button de-activated upon opening said case, said resume signal generation means further including means for receiving a signal upon de-activation of said button, and wherein said fourth event external to the computer system includes receipt of said signal.

Claim 13

In a computer system with a limited source of power, the computer system including a central processing unit (CPU) coupled to system dynamic memory and video dynamic memory coupled to a video interface unit, said system and video dynamic memory being refreshed using a first clock, a process for conserving power in refreshing the system and video dynamic memory, the process comprising the steps of: generating a suspend signal upon activation of a power suspend mode in response to a one of a first event internal to the computer system and a second event external to the computer system; generating an interrupt via an input/output unit responsive to said suspend signal; generating a first suspend control bit and a second suspend control bit via a central processing unit responsive to said interrupt; saving current system registers and stack pointers of said computer system via said central processing unit responsive to said interrupt; generating a power off signal via said input/output unit responsive to said first suspend control bit; generating a resume signal upon deactivation of the power suspend mode in response to a one of the third event internal to the computer system and a fourth event external to the computer system; generating a second clock slower than the first clock, the second clock being fast enough to be used to refresh the system and video dynamic memory without causing a loss of data contained therein; placing said system and video dynamic memory into a reduced power state by refreshing said system and video dynamic memory using the second clock, said step of placing said system and video dynamic memory into a reduced Dower state responsive to said power off signal and said second suspend control bit, respectively; disabling said first clock after the suspend signal after the step of generating a suspend signal; enabling the first clock after the resume signal after the step of generating a resume signal; and refreshing said dynamic memory using the first clock after the resume signal is received.

Claim 14

In a computer system with a limited source of power, the computer system including a central processing unit (CPU) coupled to system dynamic memory and video dynamic memory coupled to a video interface unit, said system and video dynamic memory being refreshed using a first clock, a process for conserving power in refreshing the system and video dynamic memory, the process comprising the steps of: generating a suspend signal upon activation of a power suspend mode in response to a one of a first event internal to the computer system and a second event external to the computer system; generating an interrupt via an input/output unit responsive to said suspend signal; generating a first suspend control bit and a second suspend control bit via a central processing unit responsive to said interrupt; saving current system registers and stack pointers of said computer system via said central processing unit responsive to said interrupt; generating a power off signal via said input/output unit responsive to said first suspend control bit; generating a resume signal upon deactivation of the power suspend mode in response to a one of the third event internal to the computer system and a fourth event external to the computer system; generating a second clock slower than the first clock, the second clock being fast enough to be used to refresh the system and video dynamic memory without causing a loss of data contained therein; placing said system and video dynamic memory into a reduced power state by refreshing said system and video dynamic memory using the second clock, said step of placing said system and video dynamic memory into a reduced Dower state responsive to said power off signal and said second suspend control bit, respectively; disabling said first clock after the suspend signal after the step of generating a suspend signal; enabling the first clock after the resume signal after the step of generating a resume signal; and refreshing said dynamic memory using the first clock after the resume signal is received.

Claim 15

The process of claim 12 wherein said computer system is battery powered.

Claim 16

The process of claim 12 wherein said system dynamic memory is DRAM and wherein said video dynamic memory is DRAM.

Claim 17

The process of claim 12 wherein said second event external to the computer system includes a transition of an electrical signal applied to an external circuit pin.

Claim 18

The process of claim 12 wherein said fourth event external to the computer system includes a transition of an electrical signal applied to an external circuit pin.

Claim 19

The process of claim 12 further including a step of detecting a battery low condition and wherein said first event internal to the computer system includes detection of said battery low condition.

Claim 20

The process of claim 12 further including a step of detecting a ring detect signal, wherein said fourth event external to the computer system includes receipt of said ring detect signal.

Claim 21

The process of claim 12 wherein said computer system further includes an input device and a timer and wherein said first event internal to the computer system includes: resetting said timer upon each activation of said input device.

Claim 22

The process of claim 12 wherein said computer system further includes an input device third event internal to the computer system includes: receiving an input signal generated by said input device upon activation of said input device.

Claim 23

The process of claim 12 wherein said computer system is housed in a case, said case including a button activated upon closure of said case and wherein said second event external to the computer system includes: receiving a signal upon activation of said button.

Claim 24

The process of claim 12 wherein said computer system is housed in a case, said case including a button de-activated upon opening said case and wherein said fourth event external to the computer system includes: receiving a signal upon de-activation of said button.

Claim 25

In a computer system with a limited source of power and memory being refreshed using a first clock, an apparatus for conserving power in refreshing parts of said memory, said apparatus comprising: suspend mode generation circuitry generating a suspend signal upon activation of a power suspend mode, said power suspend mode being activated in response to a first event internal to said computer system and a second event external to said computer system; an input/output unit coupled to receive said suspend signal and for generating an interrupt in response thereto; a central processing unit coupled to receive said interrupt and in response thereto for generating a first suspend control bit and a second suspend control bit and for saving current system registers and stack pointers of said computer system to a particular location in memory in response to said interrupt, said central processing unit coupled to system dynamic memory; wherein said system dynamic memory is a portion of said memory and wherein said input/output unit is coupled to receive said first suspend control bit and is also for generating a power off signal in response thereto; a video interface device coupled to a video dynamic memory wherein said video dynamic memory is a portion of said memory, said video interface device coupled to receive said second suspend control bit; resume mode generation circuitry coupled to said CPU for generating a resume signal upon deactivation of said power suspend mode, said power suspend mode being deactivated in response to a third event internal to said computer system and a fourth event external to said computer system; clock generation circuitry, coupled to said suspend mode generation circuitry and said resume mode generation circuitry, for generating a second clock slower than said first clock, said second clock being fast enough to be used to refresh said system dynamic memory and said video dynamic memory without causing a loss of data contained therein; circuitry for refreshing said video dynamic memory and said system dynamic memory using said second clock in response to said second suspend control bit and said power down signal, respectively, to place said computer system into a reduced power consumption state; circuitry for disabling said first clock after said suspend signal is received from said suspend mode generation circuitry; circuitry for enabling said first clock after said resume signal is received from said resume mode generation circuitry; and circuitry for refreshing said system dynamic memory and said video dynamic memory using said first clock after said resume signal is received from said resume mode generation circuitry.

Claim 26

In a computer system with a limited source of power and memory being refreshed using a first clock, an apparatus for conserving power in refreshing parts of said memory, said apparatus comprising: suspend mode generation circuitry generating a suspend signal upon activation of a power suspend mode, said power suspend mode being activated in response to a first event internal to said computer system and a second event external to said computer system; an input/output unit coupled to receive said suspend signal and for generating an interrupt in response thereto; a central processing unit coupled to receive said interrupt and in response thereto for generating a first suspend control bit and a second suspend control bit and for saving current system registers and stack pointers of said computer system to a particular location in memory in response to said interrupt, said central processing unit coupled to system dynamic memory; wherein said system dynamic memory is a portion of said memory and wherein said input/output unit is coupled to receive said first suspend control bit and is also for generating a power off signal in response thereto; a video interface device coupled to a video dynamic memory wherein said video dynamic memory is a portion of said memory, said video interface device coupled to receive said second suspend control bit; resume mode generation circuitry coupled to said CPU for generating a resume signal upon deactivation of said power suspend mode, said power suspend mode being deactivated in response to a third event internal to said computer system and a fourth event external to said computer system; clock generation circuitry, coupled to said suspend mode generation circuitry and said resume mode generation circuitry, for generating a second clock slower than said first clock, said second clock being fast enough to be used to refresh said system dynamic memory and said video dynamic memory without causing a loss of data contained therein; circuitry for refreshing said video dynamic memory and said system dynamic memory using said second clock in response to said second suspend control bit and said power down signal, respectively, to place said computer system into a reduced power consumption state; circuitry for disabling said first clock after said suspend signal is received from said suspend mode generation circuitry; circuitry for enabling said first clock after said resume signal is received from said resume mode generation circuitry; and circuitry for refreshing said system dynamic memory and said video dynamic memory using said first clock after said resume signal is received from said resume mode generation circuitry.

Claim 27

The apparatus claim 23 wherein said second event external to said computer system includes a transition of an electrical signal applied to an external circuit pin and wherein said fourth event external to said computer system includes a transition of an electrical signal applied to an external circuit pin.

Claim 28

The apparatus of claim 23 further including circuitry for detecting a battery low condition coupled to said suspend mode generation circuitry and wherein said first event internal to said computer system includes detection of said battery low condition.

Claim 29

The apparatus of claim 23 further including circuitry for detecting a ring detect signal coupled to said resume mode generation circuitry and wherein said fourth event external to said computer system includes receipt of said ring detect signal.

Claim 30

The apparatus of claim 23 further including an input device and a timer, said timer is reset upon each activation of said input device, said timer is coupled to said suspend mode generation circuitry, and wherein said first event internal to said computer system includes said time-out of said timer.

Claim 31

The apparatus of claim 23 further including an input device, said resume signal generation circuitry further including circuitry for receiving an input signal generated by said input device upon activation of said input device, and wherein said external to said computer includes receipt of said input signal.

Claim 32

The apparatus of claim 23 wherein said computer system is housed in a case, said case including a button activated upon closure of said case, said suspend signal generation circuitry further including circuitry for receiving a signal upon activation of said button, and wherein said second event external to said computer system includes receipt of said signal.

Claim 33

The apparatus of claim 23 wherein said computer system is housed in a case, said case including a button de-activated upon opening said case, said resume signal generation circuitry further including circuitry for receiving a signal upon deactivation of said button, and wherein said fourth event external to said computer system includes receipt of said signal.