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US5465249A
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Nonvolatile random access memory device having transistor and capacitor made in silicon carbide substrate
Assignee: Orica Explosives Technology Pty Ltd
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Filing: 1991-11-26
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Granted: 1995-11-07
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Expires: 2011-11-26
Abstract
Abstract A random access memory (RAM) cell in 6H-SiC having storage times when all bias is removed long enough to be considered nonvolatile. The nonvolatile random access memory (NVRAM) cell comprises a bit line, a charge storage device in silicon carbide, and a transistor in silicon carbide connecting the charge storage device to the bit line. The bipolar NVRAM cell has a bipolar transistor with a base region, an emitter region, and a floating collector region, wherein the charge storage device in the bipolar NVRAM is a p-n junction adjacent the floating collector region of the cell. The metal-oxide-semiconductor (MOS) NVRAM has a MOS field effect transistor (MOSFET) with a channel region, a source region, and a drain region, wherein the charge storage device in the MOS NVRAM is a MOS capacitor adjacent the drain region of the MOSFET.
Inventors
- 👤 James A. Cooper, Jr.
- 👤 John W. Palmour
- 👤 Calvin H. Carter, Jr.
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 01:49
CPC Classifications
H; H10; H10D; H10D62/00; H10D62/80; H10D62/83; H10D62/832; H10D62/8325; G; G11; G11C; G11C11/00; G11C11/21; G11C11/34; G11C11/40; G11C11/401; G11C11/403; G11C11/404; H10B; H10B12/00; H10B12/10
Claims Analysis
Total Claims: 42
Claim 1
Independent Claim
92 words
A nonvolatile random access memory (NVRAM) device having memory storage for substantially indefinite periods of time even in the absence of refresh, said NVRAM device comprising: a bit line for writing information to storage when a potential is applied thereto; and means for storing a charge for substantially indefinite periods of time, said means including a transistor formed of silicon carbide, said transistor connecting said charge storage means to said bit line so that the NVRAM device stores the charge for substantially indefinite periods of time even in the absence of refresh.
Claim 2
Dependent Claim
92 words
A nonvolatile random access memory (NVRAM) device having memory storage for substantially indefinite periods of time even in the absence of refresh, said NVRAM device comprising: a bit line for writing information to storage when a potential is applied thereto; and means for storing a charge for substantially indefinite periods of time, said means including a transistor formed of silicon carbide, said transistor connecting said charge storage means to said bit line so that the NVRAM device stores the charge for substantially indefinite periods of time even in the absence of refresh.
Claim 3
Dependent Claim
26 words
A NVRAM device according to claim 1 further comprising a word line connected to said transistor for communicating with bit line data from said bit line.
Claim 4
Dependent Claim
27 words
A NVRAM device according to claim 2 wherein said bit line data comprise a voltage high or voltage low for defining a logic one or logic zero.
Claim 5
Dependent Claim
25 words
A NVRAM according to claim 1 wherein said silicon carbide has a polytype selected from the group consisting of 3C, 2H, 4H, 6H, and 15R.
Claim 6
Dependent Claim
108 words
A nonvolatile random access memory (NVRAM) cell having memory storage for substantially indefinite periods of time even in the absence of refresh, said NVRAM cell comprising: a bipolar transistor formed in silicon carbide having a base region, an emitter region, and a floating collector region; a charge storage device formed of silicon carbide and formed from said floating collector region of said bipolar transistor; and a bit line connected to said emitter region of said bipolar transistor for writing data to and reading data from said NVRAM cell so that the NVRAM cell stores the data for substantially indefinite periods of time even in the absence of refresh.
Claim 7
Dependent Claim
108 words
A nonvolatile random access memory (NVRAM) cell having memory storage for substantially indefinite periods of time even in the absence of refresh, said NVRAM cell comprising: a bipolar transistor formed in silicon carbide having a base region, an emitter region, and a floating collector region; a charge storage device formed of silicon carbide and formed from said floating collector region of said bipolar transistor; and a bit line connected to said emitter region of said bipolar transistor for writing data to and reading data from said NVRAM cell so that the NVRAM cell stores the data for substantially indefinite periods of time even in the absence of refresh.
Claim 8
Dependent Claim
31 words
A NVRAM cell according to claim 5 further comprising a word line connected to said base region of said bipolar transistor for communicating with bit line data from said bit line.
Claim 9
Dependent Claim
27 words
A NVRAM cell according to claim 5 wherein said bit line data comprise a voltage high or voltage low for defining a logic one or logic zero.
Claim 10
Dependent Claim
24 words
A NVRAM cell according to claim 5 wherein said charge storage device is electrically connected to said floating collector region of said bipolar transistor.
Claim 11
Dependent Claim
93 words
A NVRAM cell according to claim 5 and further comprising ohmic contacts to said base and to said emitter regions of said bipolar transistor for biasing said bipolar transistor, wherein said biasing comprises a forward bias applied from said base region to said floating collector region to encourage a flow of carriers from said floating collector region to said base region so that an electrical charge will form in said charge storage device under said forward bias, and said charge storage device will retain said electrical charge when said forward bias is removed.
Claim 12
Dependent Claim
19 words
The NVRAM cell according to claim 6 wherein said word line comprises an ohmic contact to said base region.
Claim 13
Dependent Claim
19 words
The NVRAM cell according to claim 5 wherein said bit line comprises an ohmic contact to said emitter region.
Claim 14
Dependent Claim
25 words
A NVRAM according to claim 5 wherein said silicon carbide has a polytype selected from the group consisting of 3C, 2H, 4H, 6H, and 15R.
Claim 15
Dependent Claim
101 words
A nonvolatile random access memory (NVRAM) cell having memory storage for substantially indefinite periods of time even in the absence of refresh, said NVRAM cell comprising: a metal-oxide-semiconductor field effect transistor (MOSFET) formed in silicon carbide having a gate region, a source region, and a drain region; a charge storage device formed in said drain region of said MOSFET; a bit line connected to said source region of said MOSFET for reading data from and writing data to said NVRAM cell so that the NVRAM cell stores the data for substantially indefinite periods of time even in the absence of refresh.
Claim 16
Dependent Claim
101 words
A nonvolatile random access memory (NVRAM) cell having memory storage for substantially indefinite periods of time even in the absence of refresh, said NVRAM cell comprising: a metal-oxide-semiconductor field effect transistor (MOSFET) formed in silicon carbide having a gate region, a source region, and a drain region; a charge storage device formed in said drain region of said MOSFET; a bit line connected to said source region of said MOSFET for reading data from and writing data to said NVRAM cell so that the NVRAM cell stores the data for substantially indefinite periods of time even in the absence of refresh.
Claim 17
Dependent Claim
30 words
A NVRAM cell according to claim 13 further comprising a word line connected to said gate region of said MOSFET for communicating with bit line data from said bit line.
Claim 18
Dependent Claim
27 words
A NVRAM cell according to claim 14 wherein said bit line data comprise a voltage high or voltage low for defining a logic one or logic zero.
Claim 19
Dependent Claim
20 words
A NVRAM cell according to claim 14 wherein said word line comprises a gate contact layer to said gate region.
Claim 20
Dependent Claim
27 words
A NVRAM cell according to claim 13 wherein said charge storage device comprises a conductive contact layer on said drain region for defining a metal-oxide-semiconductor (MOS) capacitor.
Claim 21
Dependent Claim
22 words
A NVRAM cell according to claim 13 wherein said charge storage device is electrically connected to said drain region of said MOSFET.
Claim 22
Dependent Claim
82 words
A NVRAM cell according to claim 13 further comprising contacts to said gate and source regions of said MOSFET for biasing said MOSFET, wherein said biasing comprises a bias applied to said gate region to encourage a flow of carriers from said drain region through said gate region to said source region so that an electrical charge will form in said charge storage device under said bias, and said charge storage device will retain said electrical charge when said bias is removed.
Claim 23
Dependent Claim
20 words
A NVRAM cell according to claim 13 wherein said bit line further comprises an ohmic contact to said source region.
Claim 24
Dependent Claim
25 words
A NVRAM according to claim 13 wherein said silicon carbide has a polytype selected from the group consisting of 3C, 2H, 4H, 6H, and 15R.
Claim 25
Dependent Claim
190 words
A nonvolatile random access memory (NVRAM) device having memory storage for substantially indefinite periods of time even in the absence of refresh, said NVRAM device comprising: an array of silicon carbide memory cells arranged in a plurality of rows and columns, each silicon carbide memory cell comprising a transistor having a base region, an emitter region, and a floating collector region, and a charge storage device adjacent said floating collector region; a plurality of word lines, a respective one of which is connected to said base region of each one of all of said silicon carbide memory cells in a respective row; a plurality of bit lines, a respective one of which is connected to said emitter region of each one of all of said silicon carbide memory cells in a respective column; and means connected to said word lines for activating said transistors in a selected row to thereby transfer a charge on said charge storage devices in said selected row onto said bit lines so that each memory cell of said NVRAM device stores the charge for substantially indefinite periods of time even in the absence of refresh.
Claim 26
Dependent Claim
190 words
A nonvolatile random access memory (NVRAM) device having memory storage for substantially indefinite periods of time even in the absence of refresh, said NVRAM device comprising: an array of silicon carbide memory cells arranged in a plurality of rows and columns, each silicon carbide memory cell comprising a transistor having a base region, an emitter region, and a floating collector region, and a charge storage device adjacent said floating collector region; a plurality of word lines, a respective one of which is connected to said base region of each one of all of said silicon carbide memory cells in a respective row; a plurality of bit lines, a respective one of which is connected to said emitter region of each one of all of said silicon carbide memory cells in a respective column; and means connected to said word lines for activating said transistors in a selected row to thereby transfer a charge on said charge storage devices in said selected row onto said bit lines so that each memory cell of said NVRAM device stores the charge for substantially indefinite periods of time even in the absence of refresh.
Claim 27
Dependent Claim
25 words
A NVRAM according to claim 22 wherein said silicon carbide has a polytype selected from the group consisting of 3C, 2H, 4H, 6H, and 15R.
Claim 28
Dependent Claim
29 words
A method of fabricating a NVRAM device comprising: producing a mask having a NVRAM array configuration according to claim 22; and fabricating a NVRAM array therefrom on a substrate.
Claim 29
Dependent Claim
32 words
A method of fabricating a NVRAM device comprising: producing a master NVRAM array having a configuration according to claim 22; and replicating a plurality of NVRAM arrays therefrom on a corresponding substrate.
Claim 30
Dependent Claim
188 words
A nonvolatile random access memory (NVRAM) device having memory storage for substantially indefinite periods of time even in the absence of refresh, said NVRAM device comprising: an array of silicon carbide memory cells arranged in a plurality of rows and columns, each silicon carbide memory cell comprising a transistor having a gate region, a source region, and a drain region, and a charge storage device adjacent said drain region; a plurality of word lines, a respective one of which is connected to said gate region of each one of all of said silicon carbide memory cells in a respective row; a plurality of bit lines, a respective one of which is connected to said source region of each one of all of said silicon carbide memory cells in a respective column; and means connected to said word lines for activating said transistors in a selected row to thereby transfer a charge on said charge storage devices in said selected row onto said bit lines so that each memory cell of said NVRAM device stores the charge for substantially indefinite periods of time even in the absence of refresh.
Claim 31
Dependent Claim
188 words
A nonvolatile random access memory (NVRAM) device having memory storage for substantially indefinite periods of time even in the absence of refresh, said NVRAM device comprising: an array of silicon carbide memory cells arranged in a plurality of rows and columns, each silicon carbide memory cell comprising a transistor having a gate region, a source region, and a drain region, and a charge storage device adjacent said drain region; a plurality of word lines, a respective one of which is connected to said gate region of each one of all of said silicon carbide memory cells in a respective row; a plurality of bit lines, a respective one of which is connected to said source region of each one of all of said silicon carbide memory cells in a respective column; and means connected to said word lines for activating said transistors in a selected row to thereby transfer a charge on said charge storage devices in said selected row onto said bit lines so that each memory cell of said NVRAM device stores the charge for substantially indefinite periods of time even in the absence of refresh.
Claim 32
Dependent Claim
25 words
A NVRAM according to claim 26 wherein said silicon carbide has a polytype selected from the group consisting of 3C, 2H, 4H, 6H, and 15R.
Claim 33
Dependent Claim
29 words
A method of fabricating a NVRAM device comprising: producing a mask having a NVRAM array configuration according to claim 26; and fabricating a NVRAM array therefrom on a substrate.
Claim 34
Dependent Claim
32 words
A method of fabricating a NVRAM device comprising: producing a master NVRAM array having a configuration according to claim 26; and replicating a plurality of NVRAM arrays therefrom on a corresponding substrate.
Claim 35
Dependent Claim
99 words
A nonvolatile random access memory (NVRAM) device having memory storage for substantially indefinite periods of time even in the absence of refresh, said NVRAM device comprising: a bit line for writing information to storage when a potential is applied thereto; and means for storing a charge for substantially indefinite periods of time, said means including a charge storage device formed of silicon carbide and a transistor formed of silicon carbide connecting said charge storage device to said bit line so that the NVRAM device stores the charge for substantially indefinite periods of time even in the absence of refresh.
Claim 36
Dependent Claim
99 words
A nonvolatile random access memory (NVRAM) device having memory storage for substantially indefinite periods of time even in the absence of refresh, said NVRAM device comprising: a bit line for writing information to storage when a potential is applied thereto; and means for storing a charge for substantially indefinite periods of time, said means including a charge storage device formed of silicon carbide and a transistor formed of silicon carbide connecting said charge storage device to said bit line so that the NVRAM device stores the charge for substantially indefinite periods of time even in the absence of refresh.
Claim 37
Dependent Claim
20 words
A NVRAM device according to claim 30, further comprising means for restricting dissipation of the charge from the NVRAM device.
Claim 38
Dependent Claim
28 words
A NVRAM device according to claim 30, wherein said silicon carbide has a polytype selected from the group consisting of 3C, 2H, 4H, 6H and 15R silicon carbide.
Claim 39
Dependent Claim
112 words
A nonvolatile random access memory (NVRAM) device having memory storage for substantially indefinite periods of time even in the absence of refresh, said NVRAM device comprising: a bit line for writing information to storage when a potential is applied thereto; means for storing a charge for substantially indefinite periods of time, said means including a charge storage device and a transistor formed of silicon carbide connecting said charge storage device to said bit line; and means cooperating with said charge storage means for restricting dissipation of the charge from the NVRAM device so that the NVRAM device stores the charge for substantially indefinite periods of time even in the absence of refresh.
Claim 40
Dependent Claim
112 words
A nonvolatile random access memory (NVRAM) device having memory storage for substantially indefinite periods of time even in the absence of refresh, said NVRAM device comprising: a bit line for writing information to storage when a potential is applied thereto; means for storing a charge for substantially indefinite periods of time, said means including a charge storage device and a transistor formed of silicon carbide connecting said charge storage device to said bit line; and means cooperating with said charge storage means for restricting dissipation of the charge from the NVRAM device so that the NVRAM device stores the charge for substantially indefinite periods of time even in the absence of refresh.
Claim 41
Dependent Claim
22 words
A NVRAM device according to claim 33, wherein said means for restricting dissipation comprises an oxide layer formed adjacent said silicon carbide.
Claim 42
Dependent Claim
28 words
A NVRAM device according to claim 33, wherein said silicon carbide has a polytype selected from the group consisting of 3C, 2H, 4H, 6H and 15R silicon carbide.
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