Circuit for converting unipolar input to bipolar output

Claim 2

A circuit for converting unipolar input to bipolar output comprising: a differential amplifier including a first emitter-coupled amplifying circuit and an emitter follower output stage, said emitter follower output stage including two pairs of transistors each pair comprising a first stage transistor and a second stage transistor having a darlington connection with said first stage transistor; a peak detector including a second emitter-coupled amplifying circuit having an identical DC operation point with said first emitter-coupled amplifying circuit, a current blocking transistor a base of which is connected to the positive output of said second emitter-coupled amplifying circuit and an emitter of which is connected to a hold capacitor for maintaining peak values, and a buffer transistor a base of which is connected to an emitter of said current blocking transistor and an emitter of which is connected to the negative input of said second emitter-coupled amplifying circuit; and first and second feedback resistors; negative output of said differential amplifier being fed back to a positive input of said differential amplifier through said first feedback resistor, and a positive output of said differential amplifier being fed back to a negative input of said differential amplifier through said peak detector and said second feedback resistor, and a capacitor disposed in parallel between the base and emitter of at least said first stage transistor connected to said first emitter-coupled amplifying circuit among said pair of transistors.

Claim 3

A circuit for converting unipolar input to bipolar output comprising: a differential amplifier including a first emitter-coupled amplifying circuit and an emitter follower output stage, said emitter follower output stage including two pairs of transistors each pair comprising a first stage transistor and a second stage transistor having a darlington connection with said first stage transistor; a peak detector including a second emitter-coupled amplifying circuit having an identical DC operation point with said first emitter-coupled amplifying circuit, a current blocking transistor a base of which is connected to the positive output of said second emitter-coupled amplifying circuit and an emitter of which is connected to a hold capacitor for maintaining peak values, and a buffer transistor a base of which is connected to an emitter of said current blocking transistor and an emitter of which is connected to the negative input of said second emitter-coupled amplifying circuit; first and second feedback resistors; negative output of said differential amplifier being fed back to a positive input of said differential amplifier through said first feedback resistor, and a positive output of said differential amplifier being fed back to a negative input of said differential amplifier through said peak detector and said second feedback resistor; a capacitor disposed in parallel between the base and emitter of at least said first stage transistor connected to said first emitter-coupled amplifying circuit among said pair of transistors; a reference voltage producing circuit for producing a reference voltage equivalent to an average of positive output and negative output of said emitter follower output stage of said first stage transistor; and a switching circuit, capable of being externally turned on or off, disposed between an emitter of said current blocking transistor and said reference voltage producing circuit.

Claim 4

A circuit for converting unipolar input to bipolar output comprising: a differential amplifier including a first emitter-coupled amplifying circuit and an emitter follower output stage, said emitter follower output stage including two pairs of transistors each pair comprising a first stage transistor and a second stage transistor having a darlington connection with said first stage transistor; a peak detector including a second emitter-coupled amplifying circuit having an identical DC operation point with said first emitter-coupled amplifying circuit, a current blocking transistor a base of which is connected to the positive output of said second emitter-coupled amplifying circuit and an emitter of which is connected to a hold capacitor for maintaining peak values, and a buffer transistor a base of which is connected to an emitter of said current blocking transistor and an emitter of which is connected to the negative input of said second emitter-coupled amplifying circuit; first and second feedback resistors; negative output of said differential amplifier being fed back to a positive input of said differential amplifier through said first feedback resistor, and a positive output of said differential amplifier being fed back to a negative input of said differential amplifier through said peak detector and said second feedback resistor; a capacitor disposed in parallel between the base and emitter of at least said first stage transistor connected to said first emitter-coupled amplifying circuit among said pair of transistors; a reference voltage producing circuit for producing a reference voltage equivalent to an average of positive output and negative output of said emitter follower output stage of said first stage transistor; and a switching circuit, capable of being externally turned on or off, disposed between an emitter of said current blocking transistor and said reference voltage producing circuit.

Claim 5

A circuit for converting unipolar input to bipolar output comprising: a differential amplifier including a first emitter-coupled amplifying circuit and an emitter follower output stage, said emitter follower output stage including two pairs of transistors each pair comprising a first stage transistor and a second stage transistor having a darlington connection with said first stage transistor; a peak detector including a second emitter-coupled amplifying circuit having an identical DC operation point with said first emitter-coupled amplifying circuit, a current blocking transistor a base of which is connected to said positive output of said second emitter-coupled amplifying circuit and an emitter of which is connected to a hold capacitor for maintaining peak values, and a buffer transistor a base of which is connected to an emitter of said current blocking transistor and an emitter of which is connected to the negative input of said second emitter-coupled amplifying circuit; and first and second feedback resistors; negative output of said differential amplifier being fed back to positive input of said differential amplifier through said first feedback resistor, and positive output of said differential amplifier being fed back to negative input of said differential amplifier through said peak detector and said second feedback resistor, a reference voltage producing circuit for producing a reference voltage equivalent to an average of positive output and negative output of said emitter follower output stage of said first stage transistor; and a switching circuit capable of being externally turned on or off, disposed between an emitter of said current blocking transistor and said reference voltage producing circuit.

Claim 6

A circuit for converting unipolar input to bipolar output comprising: a differential amplifier including a first emitter-coupled amplifying circuit and an emitter follower output stage, said emitter follower output stage including two pairs of transistors each pair comprising a first stage transistor and a second stage transistor having a darlington connection with said first stage transistor; a peak detector including a second emitter-coupled amplifying circuit having an identical DC operation point with said first emitter-coupled amplifying circuit, a current blocking transistor a base of which is connected to said positive output of said second emitter-coupled amplifying circuit and an emitter of which is connected to a hold capacitor for maintaining peak values, and a buffer transistor a base of which is connected to an emitter of said current blocking transistor and an emitter of which is connected to the negative input of said second emitter-coupled amplifying circuit; and first and second feedback resistors; negative output of said differential amplifier being fed back to positive input of said differential amplifier through said first feedback resistor, and positive output of said differential amplifier being fed back to negative input of said differential amplifier through said peak detector and said second feedback resistor, a reference voltage producing circuit for producing a reference voltage equivalent to an average of positive output and negative output of said emitter follower output stage of said first stage transistor; and a switching circuit capable of being externally turned on or off, disposed between an emitter of said current blocking transistor and said reference voltage producing circuit.

Claim 7

A circuit for converting unipolar input to bipolar output in accordance with claim 3, wherein said reference voltage producing circuit comprises a voltage divider for obtaining an average of the positive output and negative output of said first emitter-coupled amplifying circuit by means of voltage division; a darlington pair including two stages of transistor, a base of a first stage transistor being connected to said voltage divider; and an impedance convertor connected to an emitter output of said first stage transistor of said darlington pair.

Claim 8

A circuit for converting unipolar input to bipolar output comprising: a differential amplifier including a first emitter-coupled amplifying circuit and an emitter follower output stage, said emitter follower output stage including two pairs of transistors each pair comprising a first stage transistor and a second stage transistor having a darlington connection with said first stage transistor; a peak detector including a second emitter-coupled amplifying circuit having an identical DC operation point with said first emitter-coupled amplifying circuit, a current blocking transistor a base of which is connected to said positive output of said second emitter-coupled amplifying circuit and an emitter of which is connected to a hold capacitor for maintaining peak values, and a buffer transistor a base of which is connected to an emitter of said current blocking transistor and an emitter of which is connected to the negative input of said second emitter-coupled amplifying circuit; first and second feedback resistors; negative output of said differential amplifier being fed back to positive input of said differential amplifier through said first feedback resistor, And positive output of said differential amplifier being fed back to a negative input of said differential amplifier through said peak detector and said second feedback resistor; a reference voltage producing circuit for producing a reference voltage equivalent to an average of a positive output and a negative output of said emitter follower output stage of said first stage transistor; a switching circuit capable of being externally turned on or off, disposed between an emitter of said current blocking transistor and said reference voltage producing circuit, and said reference voltage producing circuit comprises a voltage divider for obtaining an average of the positive output and negative output of said first emitter-coupled amplifying circuit by means of voltage division; a darlington pair including two stages of transistors, a base of a first stage transistor being connected to said voltage divider; and an impedance convertor connected to an emitter output of said first stage transistor of said darlington pair.

Claim 9

A circuit for converting unipolar input to bipolar output comprising: a differential amplifier including a first emitter-coupled amplifying circuit and an emitter follower output stage, said emitter follower output stage including two pairs of transistors each pair comprising a first stage transistor and a second stage transistor having a darlington connection with said first stage transistor; a peak detector including a second emitter-coupled amplifying circuit having an identical DC operation point with said first emitter-coupled amplifying circuit, a current blocking transistor a base of which is connected to said positive output of said second emitter-coupled amplifying circuit and an emitter of which is connected to a hold capacitor for maintaining peak values, and a buffer transistor a base of which is connected to an emitter of said current blocking transistor and an emitter of which is connected to the negative input of said second emitter-coupled amplifying circuit; first and second feedback resistors; negative output of said differential amplifier being fed back to positive input of said differential amplifier through said first feedback resistor, And positive output of said differential amplifier being fed back to a negative input of said differential amplifier through said peak detector and said second feedback resistor; a reference voltage producing circuit for producing a reference voltage equivalent to an average of a positive output and a negative output of said emitter follower output stage of said first stage transistor; a switching circuit capable of being externally turned on or off, disposed between an emitter of said current blocking transistor and said reference voltage producing circuit, and said reference voltage producing circuit comprises a voltage divider for obtaining an average of the positive output and negative output of said first emitter-coupled amplifying circuit by means of voltage division; a darlington pair including two stages of transistors, a base of a first stage transistor being connected to said voltage divider; and an impedance convertor connected to an emitter output of said first stage transistor of said darlington pair.

Claim 10

A circuit for converting unipolar input to bipolar output comprising: a first differential amplifier; first and second feedback resistors; a peak detector including a second differential amplifier; negative output of said first differential amplifier being fed back to positive input of said first differential amplifier through said first feedback resistor, and positive output of said first differential amplifier being fed back to negative input of said first differential amplifier through said peak detector and said second feedback resistor, said peak detector comprising a voltage follower circuit in which positive output of said second differential amplifier is fed back to negative input of said second differential amplifier, a first dummy differential amplifier circuit for producing a voltage equal to an output bias level of said first differential amplifier; a second dummy differential amplifier circuit for producing a voltage equal to an output bias level of said second differential amplifier being in the condition that positive output thereof is not fed back to negative input thereof; and a third differential amplifier for amplifying a difference voltage between said first and second dummy differential amplifier circuits and for feeding said amplified difference voltage back to an input of DC operation point adjustment of one of said first differential amplifier and said first dummy differential amplifier circuit, and said second differential amplifier and said second dummy differential amplifier circuit.

Claim 11

A circuit for converting unipolar input to bipolar output comprising: a first differential amplifier; first and second feedback resistors; a peak detector including a second differential amplifier; negative output of said first differential amplifier being fed back to positive input of said first differential amplifier through said first feedback resistor, and positive output of said first differential amplifier being fed back to negative input of said first differential amplifier through said peak detector and said second feedback resistor, said peak detector comprising a voltage follower circuit in which positive output of said second differential amplifier is fed back to negative input of said second differential amplifier, a first dummy differential amplifier circuit for producing a voltage equal to an output bias level of said first differential amplifier; a second dummy differential amplifier circuit for producing a voltage equal to an output bias level of said second differential amplifier being in the condition that positive output thereof is not fed back to negative input thereof; and a third differential amplifier for amplifying a difference voltage between said first and second dummy differential amplifier circuits and for feeding said amplified difference voltage back to an input of DC operation point adjustment of one of said first differential amplifier and said first dummy differential amplifier circuit, and said second differential amplifier and said second dummy differential amplifier circuit.

Claim 12

A circuit for converting unipolar input to bipolar output in accordance with claim 6, wherein said first and second dummy differential amplifier circuits and a plurality of said circuits for converting unipolar input to bipolar output are integrated into one integrated circuit chip.

Claim 13

A circuit for converting unipolar input to bipolar output comprising: a first differential amplifier; first and second feedback resistors; a peak detector; negative output of said first differential amplifier being fed back to positive input of said first differential amplifier through said first feedback resistor, and positive output of said first differential amplifier being fed back to negative input of said first differential amplifier through said peak detector and said second feedback resistor, a dummy differential amplifier circuit for producing a voltage equal to an output bias level of said first differential amplifier; a dummy peak detector for producing a voltage equal to an output bias level of said first differential amplifier; and a second differential amplifier included in said peak detector for amplifying a difference voltage between said dummy differential amplifier circuit and said dummy peak detector, and for feeding said amplified difference voltage back to an input of DC operation point adjustment of one of said first differential amplifier and said dummy differential amplifier circuit, and said peak detector and the dummy peak detector.

Claim 14

A circuit for converting unipolar input to bipolar output comprising: a first differential amplifier; first and second feedback resistors; a peak detector; negative output of said first differential amplifier being fed back to positive input of said first differential amplifier through said first feedback resistor, and positive output of said first differential amplifier being fed back to negative input of said first differential amplifier through said peak detector and said second feedback resistor, a dummy differential amplifier circuit for producing a voltage equal to an output bias level of said first differential amplifier; a dummy peak detector for producing a voltage equal to an output bias level of said first differential amplifier; and a second differential amplifier included in said peak detector for amplifying a difference voltage between said dummy differential amplifier circuit and said dummy peak detector, and for feeding said amplified difference voltage back to an input of DC operation point adjustment of one of said first differential amplifier and said dummy differential amplifier circuit, and said peak detector and the dummy peak detector.

Claim 15

A circuit for converting unipolar input to bipolar output in accordance with claim 8, wherein said dummy differential amplifier circuit, said dummy peak detector and a plurality of said circuit, for converting unipolar input to bipolar output are integrated into one integrated circuit chip.

Claim 16

A circuit for converting unipolar input to bipolar output comprising: a first differential amplifier; first and second feedback resistors; a peak detector; negative output of said first differential amplifier being fed back to positive input of said first differential amplifier through said first feedback resistor, and positive output of said first differential amplifier being fed back to negative input of said first differential amplifier through said peak detector and said second feedback resistor, a dummy circuit for converting unipolar input to bipolar output having the same direct-current characteristics as said circuit for converting unipolar input to bipolar output; and a second differential amplifier included in said peak detector for amplifying a difference voltage between positive and negative outputs of said dummy circuit for converting unipolar input to bipolar output, and for feeding said amplified difference voltage back to an input of offset adjustment of said circuit for converting unipolar input to bipolar output and said dummy circuit for converting unipolar input to bipolar output.

Claim 17

A circuit for converting unipolar input to bipolar output comprising: a first differential amplifier; first and second feedback resistors; a peak detector; negative output of said first differential amplifier being fed back to positive input of said first differential amplifier through said first feedback resistor, and positive output of said first differential amplifier being fed back to negative input of said first differential amplifier through said peak detector and said second feedback resistor, a dummy circuit for converting unipolar input to bipolar output having the same direct-current characteristics as said circuit for converting unipolar input to bipolar output; and a second differential amplifier included in said peak detector for amplifying a difference voltage between positive and negative outputs of said dummy circuit for converting unipolar input to bipolar output, and for feeding said amplified difference voltage back to an input of offset adjustment of said circuit for converting unipolar input to bipolar output and said dummy circuit for converting unipolar input to bipolar output.

Claim 18

A circuit for converting unipolar input to bipolar output in accordance with claim 10, wherein said dummy circuit for converting unipolar input to bipolar output and a plurality of said circuits for converting unipolar input to bipolar output are integrated into one integrated circuit chip.

Claim 19

A circuit for converting unipolar input to bipolar output comprising: a differential amplifier; first and second feedback resistors; and a peak detector; negative output of said differential amplifier being fed back to positive input of said differential amplifier through said first feedback resistor, and positive output of said differential amplifier being fed back to negative input of said differential amplifier through said peak detector and said second feedback resistor, said differential amplifier having two or more stages including at least an input buffer stage and an amplification stage.

Claim 20

A circuit for converting unipolar input to bipolar output comprising: a differential amplifier; first and second feedback resistors; and a peak detector; negative output of said differential amplifier being fed back to positive input of said differential amplifier through said first feedback resistor, and positive output of said differential amplifier being fed back to negative input of said differential amplifier through said peak detector and said second feedback resistor, said differential amplifier having two or more stages including at least an input buffer stage and an amplification stage.

Claim 21

A circuit for converting a unipolar input to a bipolar output in accordance with claim 12 further comprising means for determining a pods of a lowest frequency among feedback and amplifier circuits forming said circuit for converting unipolar input to bipolar output in response to a cut-of frequency of an amplification stage of said differential amplifier.