US3643113A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Voltage-to-analog pulse rate converter
Assignee: HERSEY SPARLING METER CO
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Filing: 1969-03-07
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Granted: 1972-02-15
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Expires: 1989-03-07
Abstract
Abstract A circuit is provided for converting a relatively slowly varying DC voltage value to a proportional repetitive pulse train. The circuit is especially adapted to monitoring some quantity or physical value that can be represented by a direct current input voltage when it is desired to transmit for some distance, the monitored value, without loss of accuracy in the initial measurement. The pulse train can be transmitted without change in frequency to a remote readout device.
Inventors
- 👤 Gordon L Brock
- 👤 Charles H Armstrong
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-27 12:44
CPC Classifications
H; H03; H03K; H03K7/00; H03K7/06
Claims Analysis
Total Claims: 2
Claim 1
Independent Claim
269 words
An electrical circuit for generating uniform repetitive output pulses having a repetition rate analogous to an input voltage level, said circuit comprising: electrical integrating means for integrating said input voltage level to produce a voltage ramp having a slope substantially proportional to said input voltage level said integrating means including an operational amplifier having input and output terminals and a common reference terminal, said operational amplifier having a capacitor connected between said output and input terminals, said operational amplifier further having a first resistor connected between said input terminal and a second resistor connected between said input terminal and said common reference terminal, said operational amplifier further having a diode with its anode connected to said input terminal and its cathode connected to said common reference terminal; means for resetting said voltage ramp of said integrating means to an initial value when said voltage ramp reaches a predetermined voltage level said resetting means including a unijunction transistor having an emitter and first and second bases, said first base being connected to a source of positive potential through a third resistor and said second base being connected to said common reference terminal through a fourth resistor, the emitter of said unijunction transistor being connected to said output terminal of said operational amplifier for discharging said capacitor at least initially through said diode, the emitter-to-base two circuit of said unijunction transistor and said fourth resistor when the voltage across said capacitor reaches the predetermined emitter threshold voltage of said unijunction transistor; and means responsive to the resetting of said voltage ramp for generating an output pulse having a predetermined wave shape.
Claim 2
Dependent Claim
269 words
An electrical circuit for generating uniform repetitive output pulses having a repetition rate analogous to an input voltage level, said circuit comprising: electrical integrating means for integrating said input voltage level to produce a voltage ramp having a slope substantially proportional to said input voltage level said integrating means including an operational amplifier having input and output terminals and a common reference terminal, said operational amplifier having a capacitor connected between said output and input terminals, said operational amplifier further having a first resistor connected between said input terminal and a second resistor connected between said input terminal and said common reference terminal, said operational amplifier further having a diode with its anode connected to said input terminal and its cathode connected to said common reference terminal; means for resetting said voltage ramp of said integrating means to an initial value when said voltage ramp reaches a predetermined voltage level said resetting means including a unijunction transistor having an emitter and first and second bases, said first base being connected to a source of positive potential through a third resistor and said second base being connected to said common reference terminal through a fourth resistor, the emitter of said unijunction transistor being connected to said output terminal of said operational amplifier for discharging said capacitor at least initially through said diode, the emitter-to-base two circuit of said unijunction transistor and said fourth resistor when the voltage across said capacitor reaches the predetermined emitter threshold voltage of said unijunction transistor; and means responsive to the resetting of said voltage ramp for generating an output pulse having a predetermined wave shape.
References Cited (Backward Citations)
No citation records indexed.
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1975-02-14 | 1975-08-16 | 1976-02-15 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1979-02-14 | 1979-08-16 | 1980-02-15 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1983-02-14 | 1983-08-16 | 1984-02-15 | $7700.00 | Window Closed / Lapsed |