US5453384A
Expired / Lapsed
US
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Method of making a silicon controlled rectifier device for electrostatic discharge protection
Assignee: Texas Instruments Inc
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Filing: 1994-03-25
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Granted: 1995-09-26
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Expires: 2014-03-25
Abstract
Abstract A first silicon controlled rectifier structure (220) is provided for electrostatic discharge protection, comprising a lightly doped semiconductor layer (222) having a first conductivity type and a face. A lightly doped region (224) having a second conductivity type opposite the first conductivity type is formed in the semiconductor layer (222) at the face. A first heavily doped region (226) having the second conductivity type is formed laterally within the semiconductor layer (222) at the face and is electrically coupled to a first node (62). A second heavily doped region (230) having the second conductivity type is formed laterally within the lightly doped region (224) and is electrically coupled to a second node (58). A third heavily doped region (228) having the first conductivity type is formed laterally within the lightly doped region (224) to be interposed between the first and second heavily doped regions (226 and 230) and is electrically coupled to the second node (58). A gate insulator region (233) is formed over adjacent regions of the semiconductor layer (222) and of the lightly doped region (224) to be interposed between the first (226) and third (230) heavily doped regions, such that the gate insulator region (233) is formed over a junction (236) between the semiconductor layer (222) and the lightly doped region (224). A polysilicon gate layer (237) is formed over the gate insulator region (233) and is electrically coupled to the first node (62).
Inventors
- 👤 Amitava Chatterjee
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-07 16:08
CPC Classifications
H; H10; H10D; H10D89/00; H10D89/60; H10D89/601; H10D8/00; H10D8/80
Claims Analysis
Total Claims: 32
Claim 1
Independent Claim
192 words
A method of making an electrostatic discharge-protection device, said method comprising: providing a lightly doped semiconductor layer having a first conductivity type and a face; forming a lightly doped region having a second conductivity type opposite said first conductivity type in said semiconductor layer at said face; forming a first heavily doped region having said second conductivity type within said semiconductor layer at said face and electrically coupled to a first node; forming a second heavily doped region having said second conductivity type within said lightly doped region and electrically coupled to a second node; forming a third heavily doped region having said first conductivity type within said lightly doped region and interposed between said first and second heavily doped regions and electrically coupled to said second node; forming a gate insulator region over adjacent regions of said semiconductor layer and said lightly doped region and interposed between said first and third heavily doped regions, such that said gate insulator region is formed over a junction between said semiconductor layer and said lightly doped region; and forming a gate layer over said gate insulator region and electrically coupled to said first node.
Claim 2
Independent Claim
192 words
A method of making an electrostatic discharge-protection device, said method comprising: providing a lightly doped semiconductor layer having a first conductivity type and a face; forming a lightly doped region having a second conductivity type opposite said first conductivity type in said semiconductor layer at said face; forming a first heavily doped region having said second conductivity type within said semiconductor layer at said face and electrically coupled to a first node; forming a second heavily doped region having said second conductivity type within said lightly doped region and electrically coupled to a second node; forming a third heavily doped region having said first conductivity type within said lightly doped region and interposed between said first and second heavily doped regions and electrically coupled to said second node; forming a gate insulator region over adjacent regions of said semiconductor layer and said lightly doped region and interposed between said first and third heavily doped regions, such that said gate insulator region is formed over a junction between said semiconductor layer and said lightly doped region; and forming a gate layer over said gate insulator region and electrically coupled to said first node.
Claim 3
Dependent Claim
44 words
The method of claim 1 and further comprising the step of forming a field insulator region in said lightly doped region and interposed between said gate insulator region and said third heavily doped region prior to said step of forming a polysilicon gate layer.
Claim 4
Dependent Claim
28 words
The method of claim 2, wherein said polysilicon gate layer extends over substantially all of said gate insulator region and over a portion of said field insulator region.
Claim 5
Dependent Claim
43 words
The method of claim 2 and further comprising the step of forming a field insulator region in said semiconductor layer and interposed between said gate insulator region and said first heavily doped region prior to said step of forming a polysilicon gate layer.
Claim 6
Dependent Claim
28 words
The method of claim 4, wherein said polysilicon gate layer extends over substantially all of said gate insulator region and over a portion of said field insulator region.
Claim 7
Dependent Claim
31 words
The method of claim 1 and further comprising the step of forming a field insulator region in said lightly doped region and interposed between said second and third heavily doped regions.
Claim 8
Dependent Claim
45 words
The method of claim 1 wherein said first heavily doped region forms an emitter of an npn bipolar transistor, wherein said semiconductor layer forms a base of said npn bipolar transistor, and wherein said lightly doped region forms a collector of said npn bipolar transistor.
Claim 9
Dependent Claim
27 words
The method of claim 7 wherein an inherent resistance of said semiconductor layer forms a resistance between said base and said emitter of said npn bipolar transistor.
Claim 10
Dependent Claim
45 words
The method of claim 1 wherein said semiconductor layer forms a collector of a pnp bipolar transistor, wherein said lightly doped region forms a base of said pnp bipolar transistor, and wherein said third heavily doped region forms an emitter of said pnp bipolar transistor.
Claim 11
Dependent Claim
28 words
The method of claim 9 wherein an inherent resistance of said lightly doped region forms a resistance between said base and said emitter of said pnp bipolar transistor.
Claim 12
Dependent Claim
19 words
The method of claim 1 wherein said first conductivity type is P and said second conductivity type is N.
Claim 13
Dependent Claim
20 words
The method of claim 1 wherein said first node is coupled to a voltage reference node of an electronic circuit.
Claim 14
Dependent Claim
20 words
The method of claim 12 wherein said second node is coupled to an output signal line of an electronic circuit.
Claim 15
Dependent Claim
52 words
The method of claim 13 wherein said device is operable to initiate a flow of current between said first and second nodes responsive to said second node reaching a threshold voltage relative to said first node, such that a current through said electronic circuit is reduced to avoid damaging said electronic circuit.
Claim 16
Dependent Claim
71 words
The method of claim 14 wherein said output signal line is coupled through a resistance to a source/drain of a field effect output transistor of said electronic circuit, such that said device is operable to initiate a flow of current between said first and second nodes responsive to said threshold voltage being reached by a voltage across said resistance together with a voltage between said source/drain and said voltage reference node.
Claim 17
Dependent Claim
20 words
The method of claim 12 wherein said second node is coupled to an input signal line of an electronic circuit.
Claim 18
Independent Claim
174 words
A method for making an electrostatic discharge protection device, said method comprising: providing a lightly doped semiconductor layer having a first conductivity type and a face; forming a lightly doped region having a second conductivity type opposite said first conductivity type in said semiconductor layer at said face; forming a first heavily doped region having said second conductivity type within said semiconductor layer at said face and electrically coupled to a first node, wherein said first node is coupled to a first voltage node of an electronic circuit; forming a second heavily doped region having said second conductivity type within said lightly doped region and electrically coupled to a second node, wherein said second node is coupled to a second voltage node of said electronic circuit; and forming a third heavily doped region having said first conductivity type within said lightly doped region and interposed between said first and second heavily doped regions and electrically coupled to a third node, wherein said third node is coupled to a signal line of said electronic circuit.
Claim 19
Independent Claim
174 words
A method for making an electrostatic discharge protection device, said method comprising: providing a lightly doped semiconductor layer having a first conductivity type and a face; forming a lightly doped region having a second conductivity type opposite said first conductivity type in said semiconductor layer at said face; forming a first heavily doped region having said second conductivity type within said semiconductor layer at said face and electrically coupled to a first node, wherein said first node is coupled to a first voltage node of an electronic circuit; forming a second heavily doped region having said second conductivity type within said lightly doped region and electrically coupled to a second node, wherein said second node is coupled to a second voltage node of said electronic circuit; and forming a third heavily doped region having said first conductivity type within said lightly doped region and interposed between said first and second heavily doped regions and electrically coupled to a third node, wherein said third node is coupled to a signal line of said electronic circuit.
Claim 20
Dependent Claim
59 words
The method of claim 17 and further comprising the step of forming a field insulator region in adjacent regions of said semiconductor layer and of said lightly doped region and interposed between said first and third heavily doped regions, such that said field insulator region is formed over a junction between said semiconductor layer and said lightly doped region.
Claim 21
Dependent Claim
31 words
The method of claim 17 and further comprising the step of forming a field insulator region in said lightly doped region and interposed between said second and third heavily doped regions.
Claim 22
Dependent Claim
45 words
The method of claim 17 wherein said first heavily doped region forms an emitter of an npn bipolar transistor, wherein said semiconductor layer forms a base of said npn bipolar transistor, and wherein said lightly doped region forms a collector of said npn bipolar transistor.
Claim 23
Dependent Claim
27 words
The method of claim 20 wherein an inherent resistance of said semiconductor layer forms a resistance between said base and said emitter of said npn bipolar transistor.
Claim 24
Dependent Claim
45 words
The method of claim 17 wherein said semiconductor layer forms a collector of a pnp bipolar transistor, wherein said lightly doped region forms a base of said pnp bipolar transistor, and wherein said third heavily doped region forms an emitter of said pnp bipolar transistor.
Claim 25
Dependent Claim
28 words
The method of claim 22 wherein an inherent resistance of said lightly doped region forms a resistance between said base and said emitter of said pnp bipolar transistor.
Claim 26
Dependent Claim
19 words
The method of claim 17 wherein said first conductivity type is P and said second conductivity type is N.
Claim 27
Dependent Claim
52 words
The method of claim 17 wherein said device is operable to initiate a flow of current between said first and third nodes responsive to said third node beaching a threshold voltage relative to said second node, such that a current through said electronic circuit is reduced to avoid damaging said electronic circuit.
Claim 28
Dependent Claim
68 words
The method of claim 25 wherein said semiconductor layer forms a collector of a pup bipolar transistor wherein said lightly doped region forms a base of said pnp bipolar transistor, wherein third heavily doped region forms an emitter of said pnp bipolar transistor, and wherein said threshold voltage is substantially equal to a voltage between said base and said emitter for substantially turning on said pnp bipolar transistor.
Claim 29
Dependent Claim
18 words
The method of claim 17 wherein said signal line is an output signal line of said electronic circuit.
Claim 30
Dependent Claim
18 words
The method of claim 17 wherein said signal line is an input signal line of said electronic circuit.
Claim 31
Dependent Claim
19 words
The method of claim 17 wherein said first voltage node is a voltage reference node of said electronic circuit.
Claim 32
Dependent Claim
19 words
The method of claim 17 wherein said second voltage node is a voltage supply node of said electronic circuit.
References Cited (Backward Citations)
US3986904A
Cited
US4141136A
Cited
US4400711A
Cited
US4777518A
Cited
US5012317A
Cited
JPS63310171A
Cited
US4890187A
Cited
US4939616A
Cited
US4896243A
Cited
US5041895A
Cited
US5021853A
Cited
US5072268A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1998-09-25 | 1999-03-27 | 1999-09-26 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2002-09-25 | 2003-03-27 | 2003-09-26 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2006-09-25 | 2007-03-27 | 2007-09-26 | $7700.00 | Window Closed / Lapsed |