US3986904A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Process for fabricating planar scr structure
Assignee: Harris Corp
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Filing: 1972-07-21
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Granted: 1976-10-19
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Expires: 1992-07-21
Abstract
Abstract A low resistivity anode region is formed relative to the much higher resistivity gate region in a planar semiconductor controlled rectifier (SCR) structure. The low resistivity anode region is achieved by diffusing an appropriate impurity in high concentration in a distinct diffusion step separate from the diffusion of the like conductivity type gate region. The result is a desirable optimization of certain device parameters, viz., r on and V f .
Inventors
- 👤 James D. Beasom
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-31 01:08
CPC Classifications
H; H10; H10D; H10D18/00; H10D18/251; H10D62/00; H10D62/10; H10D62/13; H10D62/141; H10D62/142
Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
103 words
A process for fabricating planar semiconductor controlled rectifiers, which comprises forming first and second spaced apart regions of like conductivity type at a planar surface of a single crystal semi-conductor body of opposite conductivity type, such that one of said first and second regions is of substantially greater resistivity than the other of said first and second regions, said one region constituting the gate region and said other region constituting the anode region of the controlled rectifier, and forming a cathode region of said opposite conductivity type with a resistivity substantially lower than the resistivity of said gate region within said gate region.
Claim 2
Dependent Claim
103 words
A process for fabricating planar semiconductor controlled rectifiers, which comprises forming first and second spaced apart regions of like conductivity type at a planar surface of a single crystal semi-conductor body of opposite conductivity type, such that one of said first and second regions is of substantially greater resistivity than the other of said first and second regions, said one region constituting the gate region and said other region constituting the anode region of the controlled rectifier, and forming a cathode region of said opposite conductivity type with a resistivity substantially lower than the resistivity of said gate region within said gate region.
Claim 3
Dependent Claim
35 words
The process according to claim 1, wherein the resistivity of said gate region is at least approximately two orders of magnitude greater than the resistivity of either of said anode region and said cathode region.
Claim 4
Dependent Claim
106 words
A process for fabricating planar silicon controlled rectifiers, which comprises diffusing first conductivity-determining impurities into the planar surface of a body of single crystal silicon of opposite conductivity type in sufficiently low concentration to form a relatively high resistivity gate region therein, diffusing said first conductivity-determining impurities into said planar surface of said silicon body at a location spaced from said gate region, in sufficiently high concentration to form a relatively low resistivity anode region therein, and diffusing opposite conductivity-determining impurities into said planar surface of said silicon body within said gate region in sufficiently high concentration to form a relatively low resistivity cathode region therein.
Claim 5
Dependent Claim
106 words
A process for fabricating planar silicon controlled rectifiers, which comprises diffusing first conductivity-determining impurities into the planar surface of a body of single crystal silicon of opposite conductivity type in sufficiently low concentration to form a relatively high resistivity gate region therein, diffusing said first conductivity-determining impurities into said planar surface of said silicon body at a location spaced from said gate region, in sufficiently high concentration to form a relatively low resistivity anode region therein, and diffusing opposite conductivity-determining impurities into said planar surface of said silicon body within said gate region in sufficiently high concentration to form a relatively low resistivity cathode region therein.
Claim 6
Dependent Claim
44 words
The process according to claim 1, wherein said gate region has a resistivity of approximately 200 ohm per square, said anode region has a resistivity of approximately 3 ohms per square, and said cathode region has a resistivity of approximately 1.5 ohms per square.
Claim 7
Dependent Claim
35 words
The process according to claim 3, wherein the resistivity of said gate region is at least approximately two orders of magnitude greater than the resistivity of either of said anode region and said cathode region.
Claim 8
Dependent Claim
44 words
The process according to claim 3, wherein said gate region has a resistivity of approximately 200 ohms per square, said anode region has a resistivity of approximately 3 ohms per square, and said cathode region has a resistivity of approximately 1.5 ohms per square.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1979-10-19 | 1980-04-19 | 1980-10-19 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1983-10-19 | 1984-04-19 | 1984-10-19 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1987-10-19 | 1988-04-19 | 1988-10-19 | $7700.00 | Window Closed / Lapsed |