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US4896243A Expired / Lapsed US ⏱️ 0.0 years remaining

Efficient ESD input protection scheme

Assignee: Texas Instruments Inc
•
Filing: 1988-12-20
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Granted: 1990-01-23
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Expires: 2008-12-20
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Abstract

Abstract An efficient ESD protection circuit is provided having a resistor (18) disposed between an input pin (12) and the functioning circuitry (22) of an integrated circuit package. A primary switching device (28) is electrically connected between the input pin (12) and a reference voltage pin (14). The resistor (18) comprises an N- well (48) formed within the P- substrate (44) and an N+ diffused reion (50) formed within the N- well (48). A silicided layer (52) is formed over the N+ region (50). The primary switching device (28) is constructed to share the same PN junction (54) utilized by the resistor (18). In constructing the primary switching device (28), a P+ region (70) is formed within the N- well (48). Further, an N+ region (68) is formed within the P- substrate (44). Thus, the primary switching device (40) includes three PN junctions (72, 54, 74) which will conduct at a time prior to, or contemporaneous with, the breakdown of resistor (18).

Inventors

  • 👤 Amitava Chatterjee
  • 👤 Charvaka Duvvury

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-30 22:49
CPC Classifications
H; H10; H10D; H10D1/00; H10D1/40; H10D1/43; H10D89/00; H10D89/60; H10D89/601

Claims Analysis

Total Claims: 15
Claim 1
Independent Claim 217 words
A circuit for dissipating an electrostatic voltage at the pin of an integrated circuit formed on a semiconductor layer of a first conductivity type, comprising: a resistor having a first node connected to said pin and a second node connected to said integrated circuit such that the current is drawn therethrough in response to an electrostatic voltage at the pin, said resistor comprising a first doped region of a second conductivity type; a first switching device disposed between said first node of said resistor and a reference voltage, said first switching device operable to conduct electricity from the pin to said reference voltage responsive to a voltage at a first value across said first switching device; a second switching device disposed between said second node of said resistor and said reference voltage for drawing current through said resistor to said reference voltage in response to a voltage at the pin of the integrated circuit at a value less than said first voltage value; and a second doped region of second conductivity type disposed between said first doped region and the semiconductor layer, said second doped region being less heavily doped than said first doped region, the breakdown voltage between said second doped region and the semiconductor layer being equal to or greater than the first voltage value.
Claim 2
Dependent Claim 217 words
A circuit for dissipating an electrostatic voltage at the pin of an integrated circuit formed on a semiconductor layer of a first conductivity type, comprising: a resistor having a first node connected to said pin and a second node connected to said integrated circuit such that the current is drawn therethrough in response to an electrostatic voltage at the pin, said resistor comprising a first doped region of a second conductivity type; a first switching device disposed between said first node of said resistor and a reference voltage, said first switching device operable to conduct electricity from the pin to said reference voltage responsive to a voltage at a first value across said first switching device; a second switching device disposed between said second node of said resistor and said reference voltage for drawing current through said resistor to said reference voltage in response to a voltage at the pin of the integrated circuit at a value less than said first voltage value; and a second doped region of second conductivity type disposed between said first doped region and the semiconductor layer, said second doped region being less heavily doped than said first doped region, the breakdown voltage between said second doped region and the semiconductor layer being equal to or greater than the first voltage value.
Claim 3
Dependent Claim 13 words
The circuit of claim 1 wherein said first switching device comprises a thyristor.
Claim 4
Dependent Claim 13 words
The circuit of claim 2 wherein said first switching device comprises an SCR.
Claim 5
Dependent Claim 67 words
The circuit of claim 2 wherein said circuit comprises: a first diffused region of said first conductivity type formed in said second doped region; and a second diffused region of said second conductivity type formed in a portion of the semiconductor layer proximate said second doped region such that current flows from said first diffused region to said second diffused region responsive to said first voltage value.
Claim 6
Dependent Claim 15 words
The circuit of claim 1 wherein said second switching device comprises a field plate diode.
Claim 7
Dependent Claim 13 words
The circuit of claim 1 wherein said resistor further comprises a silicided region.
Claim 8
Dependent Claim 183 words
A circuit for dissipating an electrostatic voltage at the pin of an integrated circuit formed on a semiconductor layer of a first conductivity type, comprising: a first switching device coupled to said pin operable to conduct electricity from the pin to a reference voltage, responsive to a voltage at a first value across said switching device; a resistor comprising a heavily doped diffused region of a second conductivity type disposed between the first switching device and the integrated circuit such that current is drawn therethrough in response to an electrostatic voltage at the pin; a lightly doped region of said second conductivity type disposed between said heavily doped diffused region and the semiconductor layer, such that the breakdown voltage between said lightly doped region and the semiconductor surface is equal to or greater than the first predetermined voltage; and a second switching device disposed between said resistor and said reference voltage for drawing current through said resistor to said reference voltage in response to the electrostatic voltage at the pin of the integrated circuit at a value less than said first voltage value.
Claim 9
Dependent Claim 183 words
A circuit for dissipating an electrostatic voltage at the pin of an integrated circuit formed on a semiconductor layer of a first conductivity type, comprising: a first switching device coupled to said pin operable to conduct electricity from the pin to a reference voltage, responsive to a voltage at a first value across said switching device; a resistor comprising a heavily doped diffused region of a second conductivity type disposed between the first switching device and the integrated circuit such that current is drawn therethrough in response to an electrostatic voltage at the pin; a lightly doped region of said second conductivity type disposed between said heavily doped diffused region and the semiconductor layer, such that the breakdown voltage between said lightly doped region and the semiconductor surface is equal to or greater than the first predetermined voltage; and a second switching device disposed between said resistor and said reference voltage for drawing current through said resistor to said reference voltage in response to the electrostatic voltage at the pin of the integrated circuit at a value less than said first voltage value.
Claim 10
Dependent Claim 68 words
The circuit of claim 7 wherein said first switching device comprises: a first diffused region of said first conductivity type formed in said lightly diffused region; and a second diffused region of said second conductivity type formed in a portion of said semiconductor layer proximate said lightly doped region such that current flows from said first diffused region to said second diffused region responsive to said breakdown voltage.
Claim 11
Dependent Claim 13 words
The circuit of claim 7 wherein said resistor further comprises a silicided region.
Claim 12
Dependent Claim 13 words
The circuit of claim 7 wherein said first switching device comprises an SCR.
Claim 13
Dependent Claim 89 words
An electrostatic discharge protection circuit connected between an input pin of an integrated circuit package and the circuit element contained therein, comprising: a first region of a first conductivity type in a semiconductor substrate of a second conductivity type; a second region of said first conductivity type in said first region; and a thyristor disposed between a input pin of the integrated circuit package and a reference voltage node, such that the firing voltage of said thyristor matches the breakdown voltage between said first region and said semiconductor substrate.
Claim 14
Dependent Claim 89 words
An electrostatic discharge protection circuit connected between an input pin of an integrated circuit package and the circuit element contained therein, comprising: a first region of a first conductivity type in a semiconductor substrate of a second conductivity type; a second region of said first conductivity type in said first region; and a thyristor disposed between a input pin of the integrated circuit package and a reference voltage node, such that the firing voltage of said thyristor matches the breakdown voltage between said first region and said semiconductor substrate.
Claim 15
Dependent Claim 19 words
The electrostatic discharge protection circuit of claim 11 wherein said first region is lighter doped than said second region.

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USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1993-01-22 1993-07-24 1994-01-23 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1997-01-22 1997-07-24 1998-01-23 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2001-01-22 2001-07-24 2002-01-23 $7700.00 Window Closed / Lapsed

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