US4605872A
Expired / Lapsed
US
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Programmable CMOS circuit for use in connecting and disconnecting a semiconductor device in a redundant electrical circuit
Assignee: Toshiba Corp
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Filing: 1983-12-06
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Granted: 1986-08-12
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Expires: 2003-12-06
Abstract
Abstract A programmable circuit is described which is particularly well suited for programming or customizing redundant elements in CMOS integrated circuits. This programmable circuit, which is formed on a semiconductor substrate together with a redundant semiconductor device, uses a parasitic switching device on the semiconductor substrate to deselect the redundant semiconductor device in response to a programming signal. The programmable circuit includes an input terminal to receive the programming signal, a parasitic SCR formed on the semiconductor substrate and coupled to the input terminal and a deselect device such as a fuse or antifuse to deselect the redundant semiconductor device. The parasitic SCR is actuated in response to the programming signal and the deselect device is connected to the SCR and the semiconductor device to deselect the semiconductor device from the redundant electrical circuit in response to the actuation of the SCR by the programming signal.
Inventors
- 👤 Robert D. Rung
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-27 09:31
CPC Classifications
G; G11; G11C; G11C29/00; G11C29/70; G11C29/78; G11C29/785; H; H03; H03K; H03K17/00; H03K17/51; H03K17/56; H03K17/567; H03K19/00; H03K19/02; H03K19/173; H03K19/1733
Claims Analysis
Total Claims: 20
Claim 1
Independent Claim
109 words
A programmable circuit for a semiconductor device formed on a semiconductor substrate for use in a redundant electrical circuit, said programmable circuit comprising: an input terminal to receive a programming signal; a switching device parasitic to said semiconductor device and intrinsic to the structure of said semiconductor substrate, said switching devices being coupled to said input terminal to generate a voltage output in response to receipt of the programming signal by said input terminal; and disconnect means coupled to said semiconductor device and responsive to the voltage output generated by said switching device for disconnecting said semiconductor device from said redundant electrical circuit in response to the programming signal.
Claim 2
Dependent Claim
109 words
A programmable circuit for a semiconductor device formed on a semiconductor substrate for use in a redundant electrical circuit, said programmable circuit comprising: an input terminal to receive a programming signal; a switching device parasitic to said semiconductor device and intrinsic to the structure of said semiconductor substrate, said switching devices being coupled to said input terminal to generate a voltage output in response to receipt of the programming signal by said input terminal; and disconnect means coupled to said semiconductor device and responsive to the voltage output generated by said switching device for disconnecting said semiconductor device from said redundant electrical circuit in response to the programming signal.
Claim 3
Dependent Claim
28 words
A programmable circuit according to claim 1 wherein said semiconductor device is a CMOS semiconductor device and said switching device is a bipolar transistor on said semiconductor substrate.
Claim 4
Dependent Claim
27 words
A programmable circuit according to claim 1 wherein said semiconductor device is a CMOS semiconductor device and said switching device is an SCR on said semiconductor substrate.
Claim 5
Dependent Claim
55 words
A programmable circuit according to claim 3 wherein said SCR comprises a npn bipolar transistor and a pnp bipolar transistor combined together to form the anode, cathode and gate of said SCR, said gate being responsive to the programming signal to turn on the anode-cathode current path of said SCR to actuate said disconnect means.
Claim 6
Dependent Claim
107 words
A programmable circuit according to claim 4 wherein the base of said pnp transistor is connected to the collector of the npn transistor, the anode of said SCR is formed by the emitter of said pnp bipolar transistor, the gate of said SCR is formed by the connection of the collector of said pnp bipolar transistor and the base of said npn bipolar transistor and the cathode of said SCR is formed by the emitter of said npn bipolar transistor, said anode being connected to said disconnect means and said gate being responsive to the programming signal to turn on said SCR to actuate said disconnect means.
Claim 7
Dependent Claim
107 words
A programmable circuit according to claim 4 wherein the base of said pnp transistor is connected to the collector of the npn transistor, the anode of said SCR is formed by the emitter of said pnp bipolar transistor, the gate of said SCR is formed by the connection of the collector of said pnp bipolar transistor and the base of said npn bipolar transistor and the cathode of said SCR is formed by the emitter of said npn bipolar transistor, said cathode being connected to said disconnect means and said gate being responsive to the programming signal to turn on said SCR to actuate said disconnect means.
Claim 8
Dependent Claim
72 words
A programmable circuit according to claim 4 wherein a first MOSFET is connected between said gate of said parasitic SCR and a first voltage source, said first MOSFET having a control terminal connected to said input terminal, said first MOSFET being responsive to the programming signal received by said input terminal and said control terminal to connect said gate of said SCR to said first voltage source to turn on said SCR.
Claim 9
Dependent Claim
14 words
A programmable circuit according to claim 7 wherein said disconnect means is a fuse.
Claim 10
Dependent Claim
14 words
A programmable circuit according to claim 7 wherein said disconnect means is an antifuse.
Claim 11
Dependent Claim
16 words
A programmable circuit according to claim 7 wherein said first MOSFET is a p channel MOSFET.
Claim 12
Dependent Claim
16 words
A programmable circuit according to claim 7 wherein said first MOSFET is an n channel MOSFET.
Claim 13
Dependent Claim
22 words
A programmable circuit according to claim 7 wherein said semiconductor device is used to check whether said disconnect means has been activated.
Claim 14
Dependent Claim
54 words
A programmable circuit according to claim 7 wherein a second MOSFET is connected between said gate of said SCR and a second voltage source, said second MOSFET being responsive to the programming signal to disconnect said gate of said SCR from said second voltage source upon actuation of said SCR by the programming signal.
Claim 15
Dependent Claim
41 words
A programmable circuit according to claim 13 wherein said second MOSFET is formed in said semiconductor substrate and has a first impurity region connected to said gate of said SCR and a second impurity region connected to said second voltage source.
Claim 16
Dependent Claim
101 words
A programmable circuit according to claim 7 wherein a second voltage source is connected to said gate of said SCR during normal operation of said programmable circuit by a second MOSFET, said second MOSFET having a control terminal connected to said input terminal, said second MOSFET being responsive to the programming signal received by said terminal and said control terminal to disconnect said gate of said SCR from said second voltage source, said programmable circuit further comprising a third voltage source connected to said disconnect means and responsive to said SCR to actuate said disconnect means to disconnect said semiconductor device.
Claim 17
Dependent Claim
158 words
A programmable circuit according to claim 7 wherein said semiconductor substrate is of a first conductivity type and said SCR is formed in a semiconductor region in said semiconductor substrate of a second conductivity type, said first MOSFET having two impurity regions and a gate electrode responsive to said programming signal and formed in said semiconductor substrate, said programmable circuit further comprising a first impurity region of said first conductivity type formed in said semiconductor region of said second conductivity type, connecting means connected between said semiconductor region and one of said two impurity regions of said first MOSFET, said first voltage source being connected to the other of said two impurity regions of said first MOSFET and to said semiconductor substrate, and a second voltage source connected to said first impurity region in said semiconductor region and to said semiconductor region, said disconnect means being inserted in a current path between said first and second voltage sources.
Claim 18
Dependent Claim
58 words
A programmable circuit according to claim 4 wherein a first voltage source is connected across the anode and cathode of said SCR and a second voltage source is connected to the base of said pnp bipolar transistor during normal operation of said programmable circuit and disconnected at the time the programming signal is applied to said input terminal.
Claim 19
Dependent Claim
109 words
A programmable circuit for a semiconductor device formed on a semiconductor substrate for use in a redundant electrical circuit, said programmable circuit comprising: an input terminal to receive a programming signal; a switching device parasitic to said semiconductor device and intrinsic to the structure of said semiconductor substrate, said switching device being coupled to said input terminal to generate a voltage output in response to receipt of the programming signal by said input terminal; and connect means coupled to said semiconductor device and responsive to the voltage output generated by said switching device for connecting said semiconductor device to said redundant electrical circuit in response to the programming signal.
Claim 20
Dependent Claim
109 words
A programmable circuit for a semiconductor device formed on a semiconductor substrate for use in a redundant electrical circuit, said programmable circuit comprising: an input terminal to receive a programming signal; a switching device parasitic to said semiconductor device and intrinsic to the structure of said semiconductor substrate, said switching device being coupled to said input terminal to generate a voltage output in response to receipt of the programming signal by said input terminal; and connect means coupled to said semiconductor device and responsive to the voltage output generated by said switching device for connecting said semiconductor device to said redundant electrical circuit in response to the programming signal.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1989-08-11 | 1990-02-10 | 1990-08-12 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1993-08-11 | 1994-02-10 | 1994-08-12 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1997-08-11 | 1998-02-10 | 1998-08-12 | $7700.00 | Window Closed / Lapsed |