Network interface for multiplexing and demultiplexing isochronous and bursty data streams in ATM networks

Claim 2

A network interface for multiplexing and demultiplexing isochronous and nonisochronous data streams in asynchronous transfer mode based communications networks, which comprises: a multiplexer portion including means for receiving isochronous and nonisochronous data from independent processors and for generating ATM cells incorporating said data, and means for multiplexing said ATM cells onto a single logical connection associated with said asynchronous transfer mode based communication network; and a demultiplexer portion including means for receiving isochronous and nonisochronous ATM cells from said single logical connection and for demultiplexing said isochronous and nonisochronous ATM cells to extract isochronous data from said isochronous ATM cells and nonisochronous data from said nonisochronous ATM cells, and means for storing said extracted isochronous and nonisochronous data for subsequent transfer to independent processors.

Claim 3

The network interface according to claim 1, wherein said multiplexer portion further comprises: first buffer means for storing isochronous data received from isochronous processors; second buffer means for storing nonisochronous data received from nonisochronous processors; and a multiplexing controller coupled to said first and second buffer means, said multiplexing controller including means for retrieving said isochronous data from said first buffer means and for creating an ATM cell incorporating said isochronous data, and means for retrieving said nonisochronous data from said second buffer means and for creating an ATM cell incorporating said nonisochronous data, and means for multiplexing said isochronous and nonisochronous ATM cells onto a single logical connection of an ATM based communication network.

Claim 4

The network interface according to claim 2, wherein said multiplexing controller comprises a microprocessor, memory and ATM cell multiplexing circuitry.

Claim 5

The network interface according to claim 1, wherein said demultiplexer portion further comprises: a demultiplexing controller coupled to said ATM based communication network, said demultiplexing controller including means for retrieving isochronous and nonisochronous ATM cells from said ATM based communication network and for demultiplexing said ATM cells and extracting said isochronous and nonisochronous data; first buffer means coupled to said demultiplexing controller for storing said received isochronous data; and second buffer means coupled to said demultiplexing controller for storing said received nonisochronous data.

Claim 6

The network interface according to claim 4, wherein said demultiplexing controller comprises a microprocessor, memory and ATM cell demultiplexing circuitry.

Claim 7

A communication asynchronous transfer mode network for multiplexing and demultiplexing isochronous and nonisochronous data streams over a single logical connection, which comprises: at least one first network interface coupled to transmitting processors, wherein said transmitting processors include isochronous and nonisochronous processors, and said first network interface receives isochronous and nonisochronous data from corresponding transmitting processors, generates individual ATM cells incorporating said isochronous data or said nonisochronous data, and multiplexes said ATM cells for subsequent transmission onto an ATM based broadband communication network; and at least one second network interface coupled to receiving processors, wherein said receiving processors include isochronous and nonisochronous processors, and said second network interface demultiplexes ATM cells received from said ATM based broadband communication network extracting said isochronous data and said nonisochronous data therefrom, and stores said extracted data for subsequent transfer to said receiving processors; wherein said ATM based broadband communication network is connected between said at least one first network interface and said at least one second network interface.

Claim 8

A communication asynchronous transfer mode network for multiplexing and demultiplexing isochronous and nonisochronous data streams over a single logical connection, which comprises: at least one first network interface coupled to transmitting processors, wherein said transmitting processors include isochronous and nonisochronous processors, and said first network interface receives isochronous and nonisochronous data from corresponding transmitting processors, generates individual ATM cells incorporating said isochronous data or said nonisochronous data, and multiplexes said ATM cells for subsequent transmission onto an ATM based broadband communication network; and at least one second network interface coupled to receiving processors, wherein said receiving processors include isochronous and nonisochronous processors, and said second network interface demultiplexes ATM cells received from said ATM based broadband communication network extracting said isochronous data and said nonisochronous data therefrom, and stores said extracted data for subsequent transfer to said receiving processors; wherein said ATM based broadband communication network is connected between said at least one first network interface and said at least one second network interface.

Claim 9

The communication network according to claim 6, wherein said first and second network interfaces comprise: a multiplexing controller coupled to said ATM based broadband communication network and to transmit buffer memory means; and a demultiplexing controller coupled to said ATM based broadband communication network and to receive buffer memory means.

Claim 10

The communication network according to claim 7, wherein said multiplexing controller comprises a microprocessor, memory and ATM cell multiplexing circuitry.

Claim 11

The communication network according to claim 7, wherein said demultiplexing controller comprises a microprocessor, memory and ATM cell demultiplexing circuitry.

Claim 14

The method according to claim 10 further comprising the steps of: receiving ATM cells transmitted from said transmitting location at a second network interface located at said receiving location; demultiplexing said received ATM cells to extract said isochronous and nonisochronous data therefrom; storing said extracted isochronous and nonisochronous data in buffer memory; and transferring said extracted isochronous and nonisochronous data from said buffer memory to corresponding isochronous and nonisochronous processors.