Method for inserting an asynchronous 139,264 kbit/s signal into a 155,520 kbit/s signal

Claim 1

A method of assembling data for a digital network by inserting an asynchronous 139,264 kbit/s signal into a pulse frame of a 155,250 kbit/s signal (STM-1) with a transport-module (STM-1) composed of 9 rows of signal bit stream, each containing, first, 9 bytes for a section head (SOH) or for a pointer (AU-4 PTR) and subsequently, a further 261 bytes for an administration unit (AU-4), said administration unit incorporating a virtual container (VC-4) composed of 9 rows, each of which rows contains, first, 1 byte for a path overhead and, subsequently, a further 260 bytes, comprising the steps of subdividing said further 260 bytes into 20 blocks of 13 bytes each; every block being subdivided into a first part having 1 byte or, respectively, 8 bits, and into a second part having 12 bytes or, respectively, 96 bits; assigning bits to the bytes of said first parts so that the first part (W) of the first block comprises respectively 8 information bits (I); the first part (X) of the second, 6th, 10th, 14th and 18th blocks each comprises 1justification control bit (C), 5 fixed justification bits (R) and 2 freely available message information bits (M); the first part (Y) of the 3rd through 5th, 7th through 9th, 11th through 13th, 15th through 17th and 19th blocks comprise respectively 8 fixed justification bits (R); and the first part (Z) of the 20th block comprises respectively 6 information bits (I), 1 possible justification bit (S) and 1 fixed justification bit (R); and assigning bits to the bytes of said second part of all blocks each comprises respectively 96 information bits (I).

Claim 2

A method of assembling data for a digital network by inserting an asynchronous 139,264 kbit/s signal into a pulse frame of a 155,250 kbit/s signal (STM-1) with a transport-module (STM-1) composed of 9 rows of signal bit stream, each containing, first, 9 bytes for a section head (SOH) or for a pointer (AU-4 PTR) and subsequently, a further 261 bytes for an administration unit (AU-4), said administration unit incorporating a virtual container (VC-4) composed of 9 rows, each of which rows contains, first, 1 byte for a path overhead and, subsequently, a further 260 bytes, comprising the steps of subdividing said further 260 bytes into 20 blocks of 13 bytes each; every block being subdivided into a first part having 1 byte or, respectively, 8 bits, and into a second part having 12 bytes or, respectively, 96 bits; assigning bits to the bytes of said first parts so that the first part (W) of the first block comprises respectively 8 information bits (I); the first part (X) of the second, 6th, 10th, 14th and 18th blocks each comprises 1justification control bit (C), 5 fixed justification bits (R) and 2 freely available message information bits (M); the first part (Y) of the 3rd through 5th, 7th through 9th, 11th through 13th, 15th through 17th and 19th blocks comprise respectively 8 fixed justification bits (R); and the first part (Z) of the 20th block comprises respectively 6 information bits (I), 1 possible justification bit (S) and 1 fixed justification bit (R); and assigning bits to the bytes of said second part of all blocks each comprises respectively 96 information bits (I).

Claim 4

A method of assembling data for a digital network by inserting an asynchronous 139,264 kbit/s signal into a pulse frame of a 155,520 kbit/s signal (STM-1) with a transport-module (STM-1) composed of 9 rows of signal bit stream each containing, first, 9 bytes for a section head (SOH) or for a pointer (AU-4 PTR) and subsequently a further 261 bytes for an administration unit (AU-4), said administration frame incorporating a virtual container (VC-4) composed of 9 rows, each of which rows contains first one byte for path overhead, and a subsequent 260 bytes in each of said 9 rows, comprising the steps of taking said 260 bytes for each of said 9 rows successively from the sequence: 1W+96I, 1X+96I, 3(1Y+96I), 1X+96I, 3(1Y+96I), 1X+96I, 3(1Y+96I), 1X+96I, 3(1Y+96I), 1X+96I, 1Y+96I, 1Z+96I, where I and W represent information bits, and X, Y and Z designate bits which are at least partially independent of the information bits.

Claim 5

A method of assembling data for a digital network by inserting an asynchronous 139,264 kbit/s signal into a pulse frame of a 155,520 kbit/s signal (STM-1) with a transport-module (STM-1) composed of 9 rows of signal bit stream each containing, first, 9 bytes for a section head (SOH) or for a pointer (AU-4 PTR) and subsequently a further 261 bytes for an administration unit (AU-4), said administration frame incorporating a virtual container (VC-4) composed of 9 rows, each of which rows contains first one byte for path overhead, and a subsequent 260 bytes in each of said 9 rows, comprising the steps of taking said 260 bytes for each of said 9 rows successively from the sequence: 1W+96I, 1X+96I, 3(1Y+96I), 1X+96I, 3(1Y+96I), 1X+96I, 3(1Y+96I), 1X+96I, 3(1Y+96I), 1X+96I, 1Y+96I, 1Z+96I, where I and W represent information bits, and X, Y and Z designate bits which are at least partially independent of the information bits.