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US5447885A Expired / Lapsed US ⏱️ 0.0 years remaining

Isolation method of semiconductor device

Assignee: Mosaid Technologies Inc
•
Filing: 1994-06-30
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Granted: 1995-09-05
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Expires: 2014-06-30
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Abstract

Abstract In a method for forming an isolation region in a semiconductor device, after forming a first oxide film and a silicon film on a semiconductor substrate, an oxidation-blocking film is formed on the silicon film. Then, a high-temperature heat treatment process is performed in a nitrogenous atmosphere. The oxidation-blocking film is selectively etched to form an opening, and a thermal oxidation process is performed to form a thermal oxide film in the opening. A bird's beak between the oxidation-blocking film and the silicon film is suppressed because of the heat treatment in a nitrogenous atmosphere, so that stable isolation characteristics can be secured.

Inventors

  • 👤 Hyun-jin Cho
  • 👤 Heung-mo Yang
  • 👤 Yun-sung Shin
  • 👤 Oh-Hyun Kwon

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-31 11:43
CPC Classifications
H; H10; H10W; H10W10/00; H10W10/01; H10W10/011; H10W10/012; H10W10/0125; H10P; H10P14/00; H10P14/60; H10P14/61

Claims Analysis

Total Claims: 9
Claim 1
Independent Claim 97 words
A method for forming an isolation region of a semiconductor device, comprising the steps of: (a) forming an oxide film on a semiconductor substrate; (b) forming a silicon layer on said oxide film; (c) forming an oxidation-blocking layer on said silicon layer; (d) heat treating said oxidation-blocking layer in a nitrogen-containing atmosphere; (e) selectively forming an opening in said heat-treated oxidation-blocking layer to expose a portion of said silicon layer; (f) thermally oxidizing said exposed portion of said silicon layer to thereby obtain a thermal oxide layer in said opening; and (g) removing said heat-treated oxidation-blocking layer.
Claim 2
Independent Claim 97 words
A method for forming an isolation region of a semiconductor device, comprising the steps of: (a) forming an oxide film on a semiconductor substrate; (b) forming a silicon layer on said oxide film; (c) forming an oxidation-blocking layer on said silicon layer; (d) heat treating said oxidation-blocking layer in a nitrogen-containing atmosphere; (e) selectively forming an opening in said heat-treated oxidation-blocking layer to expose a portion of said silicon layer; (f) thermally oxidizing said exposed portion of said silicon layer to thereby obtain a thermal oxide layer in said opening; and (g) removing said heat-treated oxidation-blocking layer.
Claim 3
Dependent Claim 26 words
An isolation method as claimed in claim 1, wherein said heat treatment step is performed after said step of forming an opening in said oxidation-blocking layer.
Claim 4
Dependent Claim 37 words
An isolation method as claimed in claim 1, wherein after said step of forming an oxidation-blocking layer said method further comprises the step of implanting nitrogen ions over a resultant structure having said oxidation-blocking layer formed thereon.
Claim 5
Dependent Claim 17 words
An isolation method according to claim 1, wherein said silicon layer is formed from an impurity-doped silicon.
Claim 6
Dependent Claim 16 words
An isolation method according to claim 1, wherein said oxidation-blocking layer is formed from silicon nitride.
Claim 7
Dependent Claim 29 words
An isolation method according to claim 1, wherein said step of heat treating said oxidation-blocking layer is carried out at at least about 1150° C. for about eight hours.
Claim 8
Dependent Claim 30 words
An isolation method according to claim 1, further comprising a step of nitrifying a resultant structure having said silicon layer formed thereon, before said step of forming said oxidation-blocking layer.
Claim 9
Dependent Claim 35 words
An isolation method according to claim 7, wherein said step of nitrifying comprises heating said resultant structure having said silicon layer formed thereon in a nitride deposition chamber to a temperature of about 850° C.

References Cited (Backward Citations)

US4016007A Cited
JPS5790960A Cited
JPS57153429A Cited
US4407696A Cited
US4900396A Cited
US4897364A Cited
US5192707A Cited
US5260229A Cited
US5338750A Cited
US5236862A Cited
US5358893A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1998-09-04 1999-03-06 1999-09-05 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2002-09-04 2003-03-06 2003-09-05 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2006-09-04 2007-03-06 2007-09-05 $7700.00 Window Closed / Lapsed

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