US5438240A
Expired / Lapsed
US
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Field emission structures produced on macro-grain polysilicon substrates
Assignee: Micron Technology Inc
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Filing: 1994-04-22
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Granted: 1995-08-01
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Expires: 2014-04-22
Abstract
Abstract A baseplate for a flat panel display comprising relatively thick semiconductor substrate, wherein the semiconductor substrate is a macro-grain polycrystalline substrate, which is amorphized by ion implantation or reformed by recrystallization, to obscure the grain boundaries, thereafter redundant circuitry may be fabricated thereon to further enhance product yield.
Inventors
- 👤 David A. Cathey
- 👤 J. Brett Rolfson
- 👤 Tyler A. Lowrey
- 👤 Trung T. Doan
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 19:09
CPC Classifications
H; H01; H01J; H01J1/00; H01J1/02; H01J1/30; H01J1/304; H01J1/3042; H01J9/00; H01J9/02; H01J9/022; H01J9/025; H01J2201/00; H01J2201/30; H01J2201/304; H01J2201/30403; H01J2201/30407
Claims Analysis
Total Claims: 23
Claim 1
Independent Claim
48 words
A flat panel display comprising: a faceplate, said faceplate having a viewer side and a second side; and a baseplate disposed in a plane parallel to said second side of said faceplate, said baseplate and said faceplate being spatially separated, said baseplate being a relatively thick macro-grain substrate.
Claim 2
Dependent Claim
48 words
A flat panel display comprising: a faceplate, said faceplate having a viewer side and a second side; and a baseplate disposed in a plane parallel to said second side of said faceplate, said baseplate and said faceplate being spatially separated, said baseplate being a relatively thick macro-grain substrate.
Claim 3
Dependent Claim
21 words
The flat panel display according to claim 1, wherein said baseplate comprises means for selectively emitting light energy in a pattern.
Claim 4
Dependent Claim
22 words
The flat panel display according to claim 2, wherein said means for selectively emitting light energy in a pattern is matrix addressable.
Claim 5
Dependent Claim
27 words
The array according to claim 3, wherein redundant address circuits are disposed superjacent said baseplate, said redundant circuits for activating said means for selectively emitting light energy.
Claim 6
Dependent Claim
27 words
The array according to claim 4, wherein said redundant circuits are comprised of at least two transistors, said transistors being at least one of CMOS and NMOS.
Claim 7
Dependent Claim
70 words
The array according to claim 3, further comprising: redundant circuits on said baseplate, each of said circuits having at least two transistors, whereby at least one of said means for selectively emitting light energy in a pattern is controlled by a set of said at least two transistors, said at least two transistors being connected in parallel, thereby compensating for any leakage in one of said at least two transistors.
Claim 8
Dependent Claim
17 words
The array according to claim 6, wherein one of said at least two transistors has been deselected.
Claim 9
Dependent Claim
51 words
A process for fabricating a baseplate having a macro-grain polysilicon substrate useful in a display device, said baseplate fabricated from the following steps comprising: reforming the macro-grain substrate, said substrate having grain boundaries, said boundaries being approximately 0.5 mm apart, whereby said reforming of said macro-grain substrate obscures said grain boundaries.
Claim 10
Dependent Claim
51 words
A process for fabricating a baseplate having a macro-grain polysilicon substrate useful in a display device, said baseplate fabricated from the following steps comprising: reforming the macro-grain substrate, said substrate having grain boundaries, said boundaries being approximately 0.5 mm apart, whereby said reforming of said macro-grain substrate obscures said grain boundaries.
Claim 11
Dependent Claim
35 words
The process according to claim 8, further comprising the step of: forming redundant circuits on said substrate, each of said circuits having at least two transistors, said at least two transistors being connected in parallel.
Claim 12
Dependent Claim
20 words
The process according to claim 9, wherein said at least two transistors are at least one of CMOS and NMOS.
Claim 13
Dependent Claim
17 words
The process according to claim 8, wherein said macro-grain substrate has a thickness greater than 300 microns.
Claim 14
Dependent Claim
21 words
The process according to claim 8, wherein said reforming step is accomplished through ion implantation, said ion implantation using fluorine ions.
Claim 15
Dependent Claim
14 words
The process according to claim 8, wherein said reforming step is accomplished through recrystallization.
Claim 16
Dependent Claim
19 words
The process according to claim 9, further comprising the step of: deselecting one of said at least two transistors.
Claim 17
Dependent Claim
25 words
The process according to claim 14, wherein said deselecting of said one of said at least two transistors is accomplished with a high energy beam.
Claim 18
Dependent Claim
75 words
A substrate for forming integrated circuits, said substrate comprising: emitter structures, said emitter structures for emitting electrons when addressed by integrated circuitry; integrated circuitry for addressing said emitter structures, said integrated circuitry comprising at least one passive circuitry and active circuitry, said active circuitry comprising at least one of transistors and capacitors, said passive circuitry comprising at least one of address lines and circuit drivers; and grain boundaries wherein said grain boundaries have been passivated.
Claim 19
Dependent Claim
75 words
A substrate for forming integrated circuits, said substrate comprising: emitter structures, said emitter structures for emitting electrons when addressed by integrated circuitry; integrated circuitry for addressing said emitter structures, said integrated circuitry comprising at least one passive circuitry and active circuitry, said active circuitry comprising at least one of transistors and capacitors, said passive circuitry comprising at least one of address lines and circuit drivers; and grain boundaries wherein said grain boundaries have been passivated.
Claim 20
Dependent Claim
28 words
The substrate according to claim 16, wherein said grain boundaries are macro-grain wherein less than one percent of said macro-grains are smaller than approximately 0.5 mm in diameter.
Claim 21
Dependent Claim
16 words
The substrate according to claim 17, wherein said substrate has a thickness greater than 300 microns.
Claim 22
Dependent Claim
17 words
The substrate according to claim 18, wherein said transistors are at least one of CMOS and NMOS.
Claim 23
Dependent Claim
12 words
The substrate according to claim 16, wherein said emitter structures are cathodes.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1998-07-31 | 1999-01-30 | 1999-08-01 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2002-07-31 | 2003-01-30 | 2003-08-01 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2006-07-31 | 2007-01-30 | 2007-08-01 | $7700.00 | Window Closed / Lapsed |