Patent US5434103A successfully refreshed from Google Patents.
US5434103A
Expired / Lapsed
US
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Method of forming an electrical connection
Assignee: Micron Technology Inc
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Filing: 1994-04-28
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Granted: 1995-07-18
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Expires: 2014-04-28
Abstract
Abstract An electrical interconnection method includes: a) providing two conductive layers separated by an insulating material on a semiconductor wafer; b) etching the conductive layers and insulating material to define and outwardly expose a sidewall of each conductive layer; c) depositing an electrically conductive material over the etched conductive layers and their respective sidewalls; and d) anisotropically etching the conductive material to define an electrically conductive sidewall link electrically interconnecting the two conductive layers. Such is utilizable to make thin film transistors and other circuitry.
Inventors
- 👤 Charles H. Dennison
- 👤 Monte Manning
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 03:46
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/01; H10D30/021; H10D30/031; H10D30/0321; H10B; H10B10/00; H10B10/12; H10B10/125; H10D30/60; H10D30/67; H10D30/6704; H10D30/6713; H10D30/6715; H10D30/6717; Y; Y10; Y10S; Y10S257/00; Y10S257/90
Claims Analysis
Total Claims: 4
Claim 1
Independent Claim
158 words
An electrical interconnection method comprising: providing inner and outer conductive layers separated by an insulating material on a semiconductor wafer; etching the conductive layers and insulating material to define and outwardly expose a sidewall of the outer conductive layer and to outwardly expose the inner conductive layer; depositing an electrically conductive material over the etched conductive layers, the electrically conductive material contacting the outer conductive layer exposed sidewall and exposed inner conductive layer; anisotropically etching the conductive material to define an electrically conductive sidewall link electrically interconnecting the two conductive layers; and further comprising: prior to depositing and anisotropic etching of the electrically conductive material, providing a layer of insulating dielectric material over the etched conductive layers and insulating material; anisotropically etching the insulating dielectric layer to define an insulating sidewall spacer, the sidewall spacer leaving the outer conductive layer sidewall and inner conductive layer outwardly exposed; and the electrically conductive material being deposited over the sidewall spacer.
Claim 2
Dependent Claim
158 words
An electrical interconnection method comprising: providing inner and outer conductive layers separated by an insulating material on a semiconductor wafer; etching the conductive layers and insulating material to define and outwardly expose a sidewall of the outer conductive layer and to outwardly expose the inner conductive layer; depositing an electrically conductive material over the etched conductive layers, the electrically conductive material contacting the outer conductive layer exposed sidewall and exposed inner conductive layer; anisotropically etching the conductive material to define an electrically conductive sidewall link electrically interconnecting the two conductive layers; and further comprising: prior to depositing and anisotropic etching of the electrically conductive material, providing a layer of insulating dielectric material over the etched conductive layers and insulating material; anisotropically etching the insulating dielectric layer to define an insulating sidewall spacer, the sidewall spacer leaving the outer conductive layer sidewall and inner conductive layer outwardly exposed; and the electrically conductive material being deposited over the sidewall spacer.
Claim 3
Dependent Claim
23 words
The electrical interconnection method of claim 1 wherein both anisotropic etches are conducted without photomasking relative to the spacer and sidewall link formations.
Claim 4
Dependent Claim
22 words
The electrical interconnection method of claim 1 comprising forming the sidewall spacer to partially overlap the outwardly exposed outer conductive layer sidewall.
References Cited (Backward Citations)
JPS59112656A
Cited
US4994400A
Cited
US4966864A
Cited
US5026663A
Cited
US5015599A
Cited
JPH04254322A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1998-07-17 | 1999-01-16 | 1999-07-18 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2002-07-17 | 2003-01-16 | 2003-07-18 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2006-07-17 | 2007-01-16 | 2007-07-18 | $7700.00 | Window Closed / Lapsed |