Method for manufacturing a laterally limited, single-crystal region on a substrate and the employment thereof for the manufacture of an MOS transistor and a bipolar transistor

Claim 1

A method for manufacturing a bipolar transistor comprising the following steps: a) providing a substrate layer made of a single crystal semiconductor material; b) forming a first layer on a surface of the substrate layer, said first layer being selectively etchable with respect to the substrate layer; c) forming a second layer on the first layer, the second layer being selectively etchable with respect to the first layer; d) providing an opening in the second layer so as to expose an area on the surface of the first layer; e) covering surfaces and sidewalls of the second layer with a third layer; f) selectively etching the first layer with respect to the substrate layer, the second layer and the third layer so as to expose the surface of the substrate layer and to provide an undercut between the second layer and the surface of the substrate layer; g) forming a single crystal region on the exposed surface of the substrate layer by selective epitaxy without nucleation occurring at the surface of the third layer; h) completely removing the third layer after the selective epitaxy step; i) forming a collector in the substrate under the single-crystal region; j) forming a base in the single-crystal region; k) doping and configuring the second layer such that it forms a base terminal; and l) forming an emitter above the base.

Claim 2

A method for manufacturing a bipolar transistor comprising the following steps: a) providing a substrate layer made of a single crystal semiconductor material; b) forming a first layer on a surface of the substrate layer, said first layer being selectively etchable with respect to the substrate layer; c) forming a second layer on the first layer, the second layer being selectively etchable with respect to the first layer; d) providing an opening in the second layer so as to expose an area on the surface of the first layer; e) covering surfaces and sidewalls of the second layer with a third layer; f) selectively etching the first layer with respect to the substrate layer, the second layer and the third layer so as to expose the surface of the substrate layer and to provide an undercut between the second layer and the surface of the substrate layer; g) forming a single crystal region on the exposed surface of the substrate layer by selective epitaxy without nucleation occurring at the surface of the third layer; h) completely removing the third layer after the selective epitaxy step; i) forming a collector in the substrate under the single-crystal region; j) forming a base in the single-crystal region; k) doping and configuring the second layer such that it forms a base terminal; and l) forming an emitter above the base.

Claim 7

A method for manufacturing a bipolar transistor, comprising: a) providing a substrate layer made of a single crystal semiconductor material and that extends between a first region for the emitter, base and collector and a second region for a collector terminal; b) forming a first layer on the substrate layer, the first layer being selectively etchable with respect to the substrate layer; c) forming a second layer on the first layer, the second layer being selectively etchable with respect to the first layer, the second layer extending only in the first region; d) forming a third layer on the second layer in the first region and on the first layer in the second region; e) planarizing the third layer so as to expose a surface of the second layer in the first region; f) forming a fourth layer on the surface of the second layer and on the planarized surface of the third layer; g) producing a mask that defines the first region for the emitter, base and collector and defines the second region laterally therefrom for a collector terminal; h) uncovering the surface of the second layer in the first region and the surface of the substrate layer in the second region by anisotropic etching that is selective with respect to silicon, the anisotropic etching not etching silicon; i) removing the second layer in the first region by anisotropic etching that is selective with respect to silicon oxide, the anisotropic etching not etching silicon oxide; j) covering surfaces and sidewalls of the second layer with a masking layer: k) selectively etching the first layer with respect to the substrate layer, the second layer and the fourth layer so as to expose the surface of the substrate layer in the first region and to provide an undercut between the second layer and the surface of the substrate layer; l) forming a single crystal region on the exposed surface of the substrate layer by selective epitaxy without nucleation occurring at the surface of the fourth layer; m) completely removing the masking layer after the selective epitaxy step; n) etching a trench into the surface of the substrate in the second region, the depth of said etched trench being dependent on the duration of the etching step; o) filling the trench with conductive material to form a collector terminal; p) forming a collector in the substrate under the single-crystal region; q) forming a base in the single-crystal region; r) doping and configuring the second layer such that it forms a base terminal; and s) forming an emitter above the base.

Claim 8

A method for manufacturing a bipolar transistor, comprising: a) providing a substrate layer made of a single crystal semiconductor material and that extends between a first region for the emitter, base and collector and a second region for a collector terminal; b) forming a first layer on the substrate layer, the first layer being selectively etchable with respect to the substrate layer; c) forming a second layer on the first layer, the second layer being selectively etchable with respect to the first layer, the second layer extending only in the first region; d) forming a third layer on the second layer in the first region and on the first layer in the second region; e) planarizing the third layer so as to expose a surface of the second layer in the first region; f) forming a fourth layer on the surface of the second layer and on the planarized surface of the third layer; g) producing a mask that defines the first region for the emitter, base and collector and defines the second region laterally therefrom for a collector terminal; h) uncovering the surface of the second layer in the first region and the surface of the substrate layer in the second region by anisotropic etching that is selective with respect to silicon, the anisotropic etching not etching silicon; i) removing the second layer in the first region by anisotropic etching that is selective with respect to silicon oxide, the anisotropic etching not etching silicon oxide; j) covering surfaces and sidewalls of the second layer with a masking layer: k) selectively etching the first layer with respect to the substrate layer, the second layer and the fourth layer so as to expose the surface of the substrate layer in the first region and to provide an undercut between the second layer and the surface of the substrate layer; l) forming a single crystal region on the exposed surface of the substrate layer by selective epitaxy without nucleation occurring at the surface of the fourth layer; m) completely removing the masking layer after the selective epitaxy step; n) etching a trench into the surface of the substrate in the second region, the depth of said etched trench being dependent on the duration of the etching step; o) filling the trench with conductive material to form a collector terminal; p) forming a collector in the substrate under the single-crystal region; q) forming a base in the single-crystal region; r) doping and configuring the second layer such that it forms a base terminal; and s) forming an emitter above the base.