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US5386342A Expired / Lapsed US ⏱️ 0.0 years remaining

Rigid backplane formed from a moisture resistant insulative material used to protect a semiconductor device

Assignee: LSI Corp
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Filing: 1993-12-23
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Granted: 1995-01-31
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Expires: 2013-12-23
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Abstract

Abstract An integrated circuit device package of this invention includes a flexible substrate having an upper patterned insulative layer, and a lower patterned conductive layer including a plurality of package leads. An integrated circuit die is fixed within a void of the upper surface of the flexible substrate, and is provided with electrical connections to the package leads. A rigid upper protective layer is provided to substantially enclose the integrated circuit die, and at least partially cover the top surface of the upper insulative layer. The integrated circuit device package further comprises a rigid or semi-rigid lower protective layer opposite the upper protective layer. The rigid lower protective layer is prefomed, and preferably is made from a material selected from the group consisting of rigid ceramic, glass, plastic, and combinations thereof. The combination of upper and lower protective layers fore a device package which provides enhanced protection from mechanical and electrical degradation of the packaged device; from injury due to environmental, shipping and handling, storage; and from use conditions. Methods of production are also given.

Inventors

  • 👤 Michael Rostoker

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-05 04:27
CPC Classifications
H; H10; H10W; H10W42/00; H10W42/121; H10W70/00; H10W70/60; H10W70/67; H10W70/688; H10W74/00; H10W74/10; H10W74/111; H10W74/121; H10W76/00; H10W76/40; H10W76/42; H10W76/47; H10W72/00; H10W72/50; H10W72/551; H10W72/552; H10W72/5522; H10W72/851; H10W72/874; H10W72/877; H10W72/884; H10W90/00; H10W90/701; H10W90/721; H10W90/724; H10W90/731; H10W90/734; H10W90/751; H10W90/754

Claims Analysis

Total Claims: 14
Claim 1
Independent Claim 149 words
A package for a semiconductor device comprising: (a) a flexible substrate having an upper patterned insulative layer and a lower patterned conductive layer laminated together, said conductive layer including a plurality of package leads; (b) a semiconductor device attached to the flexible substrate; (c) a plurality of electrical leads providing electrical connections between the semiconductor device and the package leads; (d) a rigid upper protective insulating and moisture resistant layer disposed around said electrical leads and the semiconductor device, and attached to said flexible substrate; and (e) a rigid lower protective insulating and moisture resistant layer attached to said flexible substrate and opposite the upper protective layer, said lower protective layer proximate to and substantially covering said flexible substrate conductive layer except the package leads, wherein the rigid upper protective layer and the rigid lower protective layer act to substantially enclose the semiconductor device and prevent moisture penetration therein.
Claim 2
Dependent Claim 149 words
A package for a semiconductor device comprising: (a) a flexible substrate having an upper patterned insulative layer and a lower patterned conductive layer laminated together, said conductive layer including a plurality of package leads; (b) a semiconductor device attached to the flexible substrate; (c) a plurality of electrical leads providing electrical connections between the semiconductor device and the package leads; (d) a rigid upper protective insulating and moisture resistant layer disposed around said electrical leads and the semiconductor device, and attached to said flexible substrate; and (e) a rigid lower protective insulating and moisture resistant layer attached to said flexible substrate and opposite the upper protective layer, said lower protective layer proximate to and substantially covering said flexible substrate conductive layer except the package leads, wherein the rigid upper protective layer and the rigid lower protective layer act to substantially enclose the semiconductor device and prevent moisture penetration therein.
Claim 3
Dependent Claim 17 words
The package of claim 1 wherein the lower patterned conductive layer further comprises a die attach pad.
Claim 4
Dependent Claim 28 words
The package of claim 2 wherein the plurality of electrical leads providing electrical connections between the integrated circuit die and the package leads are formed by wire bonding.
Claim 5
Dependent Claim 29 words
The package of claim 1 wherein the plurality of electrical leads providing electrical connections between the integrated circuit die and the package leads are formed by tape automated bonding.
Claim 6
Dependent Claim 29 words
The package of claim 1 wherein the rigid lower protective layer is made of a material selected from the group consisting of rigid ceramic, glass, plastic, and combinations thereof.
Claim 7
Dependent Claim 37 words
The semiconductor device package of claim 1 wherein the lower patterned conductive layer further comprises a semiconductor device attach pad supported between the upper film layer and the lower rigid protective layer for supporting the semiconductor device.
Claim 8
Dependent Claim 32 words
The semiconductor device package of claim 6 wherein the plurality of electrical leads providing electrical connections between the integrated circuit and the leads are formed at least in part by wire bonding.
Claim 9
Dependent Claim 34 words
The semiconductor device package of claim 1 wherein the plurality of electrical leads providing electrical connections between the semiconductor device and the package leads are formed at least in part by tape automated bonding.
Claim 10
Dependent Claim 14 words
The package of claim 1, wherein the semiconductor device is an integrated circuit die.
Claim 11
Dependent Claim 12 words
The package of claim 1, wherein the semiconductor device is a transistor.
Claim 12
Dependent Claim 14 words
The package of claim 1, wherein the semiconductor device is a plurality of transistors.
Claim 13
Independent Claim 134 words
A method of producing a semiconductor package comprising: (a) providing a flexible laminated substrate having (i) an upper patterned insulative layer; and (ii) a lower patterned conductive layer including a plurality of package leads; (b) attaching a semiconductor device to the flexible substrate and connecting a plurality of electrical leads to make electrical connections between the semiconductor device and the package leads; (c) attaching a rigid upper protective insulating and moisture resistant layer around said electrical leads and semiconductor device at least partially surrounding the upper insulative layer, electrical leads and semiconductor device; and (d) attaching a rigid lower protective insulating and moisture resistant layer opposite the upper protective layer, wherein the rigid upper protective layer and the rigid lower protective layer act to substantially enclose the semiconductor device and prevent moisture penetration therein.
Claim 14
Independent Claim 134 words
A method of producing a semiconductor package comprising: (a) providing a flexible laminated substrate having (i) an upper patterned insulative layer; and (ii) a lower patterned conductive layer including a plurality of package leads; (b) attaching a semiconductor device to the flexible substrate and connecting a plurality of electrical leads to make electrical connections between the semiconductor device and the package leads; (c) attaching a rigid upper protective insulating and moisture resistant layer around said electrical leads and semiconductor device at least partially surrounding the upper insulative layer, electrical leads and semiconductor device; and (d) attaching a rigid lower protective insulating and moisture resistant layer opposite the upper protective layer, wherein the rigid upper protective layer and the rigid lower protective layer act to substantially enclose the semiconductor device and prevent moisture penetration therein.

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1998-01-30 1998-08-01 1999-01-31 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2002-01-30 2002-08-01 2003-01-31 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2006-01-30 2006-08-01 2007-01-31 $7700.00 Window Closed / Lapsed

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