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US5376576A Expired / Lapsed US ⏱️ 0.0 years remaining

Method for the insulation of polysilicon film in semiconductor device

Assignee: SK Hynix Inc
•
Filing: 1993-11-16
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Granted: 1994-12-27
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Expires: 2013-11-16
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Abstract

Abstract A method for insulating a polysilicon film in a semiconductor device is disclosed. The method comprises the steps of: forming a trench in a semiconductor covered with a first oxide film, a buffing polysilicon film and a nitride film in due order, with a mask pattern for forming the trench; coating the trench with an insulating film and filling the resulting trench with a polysilicon film for forming charge storage electrode; oxidizing the surface of the polysilicon to form a second oxide film on the polysilicon film; and implanting silicon atoms in the polysilicon film through the second oxide film to make a predetermined, upper portion of the polysilicon film be amorphous. The thickness difference of the oxide film formed on the polysilicon film of the trench is minimized by use of the buffing polysilicon film according to the present invention. In addition, ion implantation of silicon atom make a predetermined, upper portion of the polysilicon film of the trench be amorphous, resulting in the improvement of insulating characteristics of charge storage electrode formed in the trench. Consequently, the reliability for trench capacitor of semiconductor device is much enhanced, in accordance with the present invention.

Inventors

  • 👤 Chang S. Moon
  • 👤 Dae I. Park
  • 👤 Sang H. Park

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-28 18:34
CPC Classifications
H; H10; H10W; H10W10/00; H10B; H10B12/00; H10B12/01; H10B12/02; H10B12/03; H10B12/038; H10W10/01; H10W10/011; H10W10/012; H10W10/0128; H10W10/041; H10W10/10; H10W10/13; H10W10/40; Y; Y10; Y10S; Y10S438/00; Y10S438/981

Claims Analysis

Total Claims: 6
Claim 1
Independent Claim 107 words
A method for insulating a polysilicon film of semiconductor device, comprising the steps of: forming a trench in a semiconductor covered with a first oxide film, a buffing polysilicon film and a nitride film in due order, with a mask pattern for forming the trench; coating the trench with an insulating film and filling the resulting trench with a polysilicon film for forming charge storage electrode; oxidizing the surface of the polysilicon to form a second oxide film on the polysilicon film; and implanting silicon atoms in the polysilicon film through the second oxide film to make a predetermined, upper portion of the polysilicon film be amorphous.
Claim 2
Independent Claim 107 words
A method for insulating a polysilicon film of semiconductor device, comprising the steps of: forming a trench in a semiconductor covered with a first oxide film, a buffing polysilicon film and a nitride film in due order, with a mask pattern for forming the trench; coating the trench with an insulating film and filling the resulting trench with a polysilicon film for forming charge storage electrode; oxidizing the surface of the polysilicon to form a second oxide film on the polysilicon film; and implanting silicon atoms in the polysilicon film through the second oxide film to make a predetermined, upper portion of the polysilicon film be amorphous.
Claim 3
Dependent Claim 20 words
A method according to claim 1, wherein said second oxide film has a thickness of approximately 3,000 to 6,000 Å.
Claim 4
Dependent Claim 34 words
A method according to claim 1, wherein said silicon atoms is implanted at a dose of approximately 10 14 to 10 19 atoms/cm 2 under an acceleration energy of approximately 10 to 50 KeV.
Claim 5
Dependent Claim 21 words
A method according to claim 1, wherein said insulating film coated on the surface of said trench is an oxide film.
Claim 6
Dependent Claim 30 words
A method according to claim 1, wherein said insulating film coated on the surface of said trench is a double film consisting of an oxide film and a nitride film.

References Cited (Backward Citations)

US4939104A Cited
JPS63227050A Cited
US5066607A Cited
EP0333426A2 Cited
JPH026157A Cited
US5225363A Cited
US5075248A Cited
US5064777A Cited
US5156993A Cited
US5198383A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1997-12-26 1998-06-27 1998-12-27 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2001-12-26 2002-06-27 2002-12-27 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2005-12-26 2006-06-27 2006-12-27 $7700.00 Window Closed / Lapsed

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