Patent US5365231A successfully refreshed from Google Patents.
US5365231A
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Encoding apparatus for digital signal with improved block channel coding
Assignee: Toshiba Corp
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Filing: 1992-03-27
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Granted: 1994-11-15
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Expires: 2012-03-27
Abstract
Abstract An encoder separates an input digital signal including m bits into the first group and the second group, and encodes each piece of data in the first group to a single code word including n bits in one-to-one correspondence and encodes each piece of data in the second group to two code words each including n bits in one-to-two correspondence. A CDS calculator calculates a CDS value for each of the words output from the encoder. A DSV calculator calculates the accumulated DSV value of the individual words output from the encoder. When the two-n-bit code words are output from the encoder, a code selector selects that one of the code words which decreases the next accumulated DSV value to be calculated by the DSV calculator, according to the CDS value from the CDS calculator and the accumulated DSV value from the DSV calculator. A margin bit generator generates a predetermined margin bit which decreases the next accumulated DSV value to be calculated by the DSV calculator, according to the CDS value from the CDS calculator and the accumulated DSV value from the DSV calculator, and inserts the margin bit in the single n-bit code word output from the encoder and the one code word selected by the code selector. A transfer section transfers the resulting n+1 bits.
Inventors
- 👤 Kazuharu Niimura
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-07 23:05
CPC Classifications
G; G11; G11B; G11B20/00; G11B20/10; G11B20/14; G11B20/1403; G11B20/1423; G11B20/1426; H; H03; H03M; H03M5/00; H03M5/02; H03M5/04; H03M5/14; H03M5/145; H04; H04N; H04N9/00; H04N9/79; H04N9/80; H04N9/804; H04N9/808; G11B2020/1469
Claims Analysis
Total Claims: 13
Claim 1
Independent Claim
297 words
An encoding apparatus comprising: encoding means for separating an input digital signal including m bits (m: a positive integer) into a first group and a second group predetermined with respect to 2 m pieces of data allowable for said input digital signal, and encoding each piece of data in said first group to a single code word including n bits (n being a positive integer and larger than m) in one-to-one correspondence and encoding each piece of data in said second group to two code words each including n bits in one-to-two correspondence; CDS (Code word Digital Sum) calculating means for calculating a CDS value for each of said words output from said encoding means; DSV (Digital Sum Variation) calculating means for calculating an accumulated DSV value of said individual words output from said encoding means; code selecting means for, when said two-n-bit code words are output from said encoding means, selecting that one of said code words which decreases a next accumulated DSV value to be calculated by said DSV calculating means, in accordance with said CDS value from said CDS calculating means and said accumulated DSV value from said DSV calculating means; margin bit inserting means for generating a predetermined margin bit which decreases a next accumulated DSV value to be calculated by said DSV calculating means, in accordance with said CDS value from said CDS calculating means and said accumulated DSV value from said DSV calculating means, and inserting said margin bit in said single n-bit code word output from said encoding means and said one code word selected by said code selecting means; and transfer means for transferring an encoded code word including a total of n+1 bits resulting from the insertion of said predetermined margin bit by said margin bit inserting means.
Claim 2
Dependent Claim
297 words
An encoding apparatus comprising: encoding means for separating an input digital signal including m bits (m: a positive integer) into a first group and a second group predetermined with respect to 2 m pieces of data allowable for said input digital signal, and encoding each piece of data in said first group to a single code word including n bits (n being a positive integer and larger than m) in one-to-one correspondence and encoding each piece of data in said second group to two code words each including n bits in one-to-two correspondence; CDS (Code word Digital Sum) calculating means for calculating a CDS value for each of said words output from said encoding means; DSV (Digital Sum Variation) calculating means for calculating an accumulated DSV value of said individual words output from said encoding means; code selecting means for, when said two-n-bit code words are output from said encoding means, selecting that one of said code words which decreases a next accumulated DSV value to be calculated by said DSV calculating means, in accordance with said CDS value from said CDS calculating means and said accumulated DSV value from said DSV calculating means; margin bit inserting means for generating a predetermined margin bit which decreases a next accumulated DSV value to be calculated by said DSV calculating means, in accordance with said CDS value from said CDS calculating means and said accumulated DSV value from said DSV calculating means, and inserting said margin bit in said single n-bit code word output from said encoding means and said one code word selected by said code selecting means; and transfer means for transferring an encoded code word including a total of n+1 bits resulting from the insertion of said predetermined margin bit by said margin bit inserting means.
Claim 3
Dependent Claim
17 words
An encoding apparatus according to claim 1, wherein said m is 8 and said n is 12.
Claim 4
Dependent Claim
45 words
An encoding apparatus according to claim 2, wherein said encoding means includes means for encoding data "0" to "140" as said first group, out of "0" to "255" which said input digital signal can have, and encoding data "141" to "255" as said second group.
Claim 5
Dependent Claim
201 words
An encoding apparatus comprising: encoding means for encoding an input digital video signal including m bits (m: a positive integer) per word to a code word including n bits with the number of consecutive bits of a same binary value after NRZI-modulating, being defined to be 2 or greater for every i words (i being a positive integer equal to or greater than 2) having a mutual correlation (n being an integer and n>m*i), in one-to-one correspondence, said encoding means classifying in advance said input video signal into a plurality of regions according to a CDS (Cord word Digital Sum) value of each of 2 m*i pieces of data allowable for said n-bit code word and assigning that signal of said code word corresponding to said i-word digital signal which has a small variation per word to that region whose absolute value of the CDS value is small to execute encoding; margin bit inserting means for inserting a predetermined margin bit in said n-bit code word output from said encoding means; and transfer means for transferring an encoded code word including a total of n+1 bits resulting from the insertion of said predetermined margin bit by said margin bit inserting means.
Claim 6
Dependent Claim
201 words
An encoding apparatus comprising: encoding means for encoding an input digital video signal including m bits (m: a positive integer) per word to a code word including n bits with the number of consecutive bits of a same binary value after NRZI-modulating, being defined to be 2 or greater for every i words (i being a positive integer equal to or greater than 2) having a mutual correlation (n being an integer and n>m*i), in one-to-one correspondence, said encoding means classifying in advance said input video signal into a plurality of regions according to a CDS (Cord word Digital Sum) value of each of 2 m*i pieces of data allowable for said n-bit code word and assigning that signal of said code word corresponding to said i-word digital signal which has a small variation per word to that region whose absolute value of the CDS value is small to execute encoding; margin bit inserting means for inserting a predetermined margin bit in said n-bit code word output from said encoding means; and transfer means for transferring an encoded code word including a total of n+1 bits resulting from the insertion of said predetermined margin bit by said margin bit inserting means.
Claim 7
Dependent Claim
21 words
An encoding apparatus according to claim 4, wherein said m is 8, said i is 2 and said n is 23.
Claim 8
Dependent Claim
27 words
An encoding apparatus according to claim 5, wherein said plurality of regions include nine regions where said CDS values correspond to 0, ±2, ∓4, ±6 and ±8.
Claim 9
Dependent Claim
205 words
An encoding apparatus for encoding an input digital video signal including m bits (m being a positive integer) per word to a predetermined serial data and transferring said code word to a predetermined transfer path, comprising: encoding means for encoding said digital video signal including m bits per word to a code word consisting of n bits with the number of consecutive bits of a same binary value being defined to be 2 or greater for every i words (i being a positive integer equal to or greater than 2) having a mutual correlation (n being a positive integer and n>m*i), in one-to-one correspondence, said encoding means classifying in advance said input digital video signal into a plurality of regions according to a product of a spectrum of each of 2 m*i pieces of data allowable for said n-bit code word and a C/N (carrier-to-noise) ratio and assigning that signal of said code word corresponding to said i-word digital signal which has a small variation per word to that region for which a product of said spectrum and said C/N ratio is large to execute encoding; and transfer means for transferring on said predetermined transfer path an encoded code word encoded by said encoding means.
Claim 10
Dependent Claim
205 words
An encoding apparatus for encoding an input digital video signal including m bits (m being a positive integer) per word to a predetermined serial data and transferring said code word to a predetermined transfer path, comprising: encoding means for encoding said digital video signal including m bits per word to a code word consisting of n bits with the number of consecutive bits of a same binary value being defined to be 2 or greater for every i words (i being a positive integer equal to or greater than 2) having a mutual correlation (n being a positive integer and n>m*i), in one-to-one correspondence, said encoding means classifying in advance said input digital video signal into a plurality of regions according to a product of a spectrum of each of 2 m*i pieces of data allowable for said n-bit code word and a C/N (carrier-to-noise) ratio and assigning that signal of said code word corresponding to said i-word digital signal which has a small variation per word to that region for which a product of said spectrum and said C/N ratio is large to execute encoding; and transfer means for transferring on said predetermined transfer path an encoded code word encoded by said encoding means.
Claim 11
Dependent Claim
88 words
An encoding apparatus according to claim 7, further comprising: margin bit inserting means for inserting a predetermined margin bit in said n-bit code word output from said encoding means, when the number of consecutive bits of a same binary value is defined 2 or greater to the code word of n bits, and wherein said transfer means transfers on said predetermined transfer path an encoded code word including a total of n+1 bits resulting from the insertion of said predetermined margin bit by said margin bit inserting means.
Claim 12
Dependent Claim
21 words
An encoding apparatus according to claim 8, wherein said m is 8, said i is 2 and said n is 23.
Claim 13
Dependent Claim
15 words
An encoding apparatus according to claim 9, wherein said plurality of regions include nine regions.
References Cited (Backward Citations)
US4531153A
Cited
JPS5875950A
Cited
JPS60124148A
Cited
EP0178813A2
Cited
EP0177950A2
Cited
US4775985A
Cited
US4985700A
Cited
EP0351055A1
Cited
EP0392506A2
Cited
US4988999A
Cited
US5192949A
Cited
US5196848A
Cited
US5198813A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1997-11-14 | 1998-05-16 | 1998-11-15 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2001-11-14 | 2002-05-16 | 2002-11-15 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2005-11-14 | 2006-05-16 | 2006-11-15 | $7700.00 | Window Closed / Lapsed |