US4985700A
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Variable-length coding/decoding device
Assignee: Canon Inc
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Filing: 1989-02-22
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Granted: 1991-01-15
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Expires: 2009-02-22
Abstract
Abstract In a variable-length coding/decoding device, an r·m-bit data word is converted into an r·n-bit code word, where r is an integer having the relationship 1≦r≦r max , a basic data word length consists of a m bits (m is a positive integer), and a basic code word length consists of n bits (n is a positive integer), and each of data words of a variable-length run-length-limited code limiting the run number of bits of a first value (e.g., "o") between successive bits of a second value (e.g., "1") in a binary-coded bit string generated by concatenation of code words after the conversion to a value no smaller than d and no larger than k into a code word corresponding to thereto. At that time, an input data word is once coded into an r max ·q-bit (q is a positive integer) code word, and then divided into r max blocks each consisting of q bits, and a code word in each of the blocks is coded to obtain a variable-length run-length-limited code word. Also, the variable-length run-length-limited code word is inverted into a data word corresponding thereto. At that time, the input code word is divided into r max blocks each consisting of n bits, and a code word in each of the blocks is once decoded into a q-bit (q is a positive integer) code word. Then, the r max ·q-bit code word is decoded to obtain a data word.
Inventors
- 👤 Fumiyuki Mikami
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-03 05:41
CPC Classifications
H; H03; H03M; H03M7/00; H03M7/30; H03M7/40; H03M7/42; H03M5/00; H03M5/02; H03M5/04; H03M5/14; H03M5/145
Claims Analysis
Total Claims: 14
Claim 1
Independent Claim
194 words
A variable-length coding device for converting an r·m-bit data word into an r·n-bit code word, where r is an integer having the relationship 1≦r≦r max , a basic data word length consists of m bits (m being a positive integer), and a basic code word length consists of n bits (n being a positive integer), and converting each of the data words of a variable-length run-length-limited code limiting the run number of bits of a first value between successive bits of a second value in a binary-coded bit string generated by concatenation of code words after the conversion to a value no smaller than d and no larger than k (d and k being positive integers), into a code word corresponding thereto, said variable-length coding device comprising: (A) first coding means for coding an input data word into r max ·q (q is a positive integer) bits, and outputting a first code word; and (B) second coding means for dividing the first code word output from said first coding means into r max blocks each consisting of q bits, coding a code word in each of the blocks, and outputting a second code word.
Claim 2
Dependent Claim
194 words
A variable-length coding device for converting an r·m-bit data word into an r·n-bit code word, where r is an integer having the relationship 1≦r≦r max , a basic data word length consists of m bits (m being a positive integer), and a basic code word length consists of n bits (n being a positive integer), and converting each of the data words of a variable-length run-length-limited code limiting the run number of bits of a first value between successive bits of a second value in a binary-coded bit string generated by concatenation of code words after the conversion to a value no smaller than d and no larger than k (d and k being positive integers), into a code word corresponding thereto, said variable-length coding device comprising: (A) first coding means for coding an input data word into r max ·q (q is a positive integer) bits, and outputting a first code word; and (B) second coding means for dividing the first code word output from said first coding means into r max blocks each consisting of q bits, coding a code word in each of the blocks, and outputting a second code word.
Claim 3
Dependent Claim
78 words
A variable-length coding device according to claim 1, wherein, when there are p (p being a positive integer) kinds of patterns of basic code words having an n-bit basic code word length, said first coding means outputs a code word, each block of which consists of a q-bit (q is a minimum integer satisfying p<2 q ) code word corresponding to said p kinds of basic code word patterns, by r max blocks for the input data word.
Claim 4
Dependent Claim
49 words
A variable-length coding device according to claim 2, wherein said second coding means includes r max encoders, each of which receives a respective q-bit code word and each of which outputs an n-bit code word having a basic code word pattern uniquely assigned by the respective q-bit code word.
Claim 5
Dependent Claim
17 words
A variable-length coding device according to claim 1, wherein said first coding means includes a memory circuit.
Claim 6
Dependent Claim
17 words
A variable-length coding device according to claim 1, wherein said second coding device includes a memory circuit.
Claim 7
Dependent Claim
16 words
A variable-length coding device according to claim 1, wherein said second coding means includes gate circuits.
Claim 8
Dependent Claim
200 words
A variable-length decoding device for converting an r·m-bit data word into an r·n-bit code word, where r is an integer having the relationship 1≦r≦r max , a basic data word length consists of m bits (m being a positive integer), and a basic code word length consists of n bits (n being a positive integer), and inverting each of the code words of a variable-length run-length-limited code limiting the run number of bits of a first value between successive bits of a second value in a binary-coded bit string generated by concatenation of code words after the conversion to a value no smaller than d and no larger than k (d and k being positive integers), into a data word corresponding thereto, said variable-length decoding device comprising: (A) first decoding means for dividing an input code word into r max blocks each consisting of n bits, decoding a code word in each of the blocks into a q-bit (q is a positive integer) code word, and outputting a r max ·q-bit first code word; and (B) second decoding means for decoding the r max ·q-bit first code word output from said first decoding means, and outputting a second code word.
Claim 9
Dependent Claim
200 words
A variable-length decoding device for converting an r·m-bit data word into an r·n-bit code word, where r is an integer having the relationship 1≦r≦r max , a basic data word length consists of m bits (m being a positive integer), and a basic code word length consists of n bits (n being a positive integer), and inverting each of the code words of a variable-length run-length-limited code limiting the run number of bits of a first value between successive bits of a second value in a binary-coded bit string generated by concatenation of code words after the conversion to a value no smaller than d and no larger than k (d and k being positive integers), into a data word corresponding thereto, said variable-length decoding device comprising: (A) first decoding means for dividing an input code word into r max blocks each consisting of n bits, decoding a code word in each of the blocks into a q-bit (q is a positive integer) code word, and outputting a r max ·q-bit first code word; and (B) second decoding means for decoding the r max ·q-bit first code word output from said first decoding means, and outputting a second code word.
Claim 10
Dependent Claim
77 words
A variable-length decoding device according to claim 7, wherein said first decoding means includes r max decoders, and each of the decoders is arranged so that, when there are p (p is a positive integer) kinds of patterns of basic code words having an n-bit basic code word length, it outputs a code word consisting of q (q is a minimum integer satisfying p<2 q ) bits corresponding to said p kinds of basic code word patterns.
Claim 11
Dependent Claim
40 words
A variable-length decoding device according to claim 8, wherein said second decoding means is arranged so that it outputs an r max ·n bit code word having a code word pattern uniquely assigned by the r max ·q-bit code word.
Claim 12
Dependent Claim
17 words
A variable-length decoding device according to claim 7, wherein said first decoding means includes a memory circuit.
Claim 13
Dependent Claim
16 words
A variable-length decoding device according to claim 7, wherein said first decoding means includes gate circuits.
Claim 14
Dependent Claim
17 words
A variable-length decoding device according to claim 7, wherein said second decoding means includes a memory circuit.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1994-01-14 | 1994-07-16 | 1995-01-15 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1998-01-14 | 1998-07-16 | 1999-01-15 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2002-01-14 | 2002-07-16 | 2003-01-15 | $7700.00 | Window Closed / Lapsed |