Method of making semiconductor structure with germanium implant for reducing short channel effects and subthreshold current near the substrate surface

Claim 1

A method for producing an NMOS device having reduced Drain Induced Barrier Lowering (DIBL) induced currents of short channel effects, the method comprising the steps of: placing boron into a surface region of a p-type substrate; growing a field oxide above said surface region upon said substrate; growing a gate oxide and patterning a polysilicon gate over said gate oxide a lateral spaced distance from said field oxide; implanting phosphorous into said substrate and within said lateral spaced distance to a concentration peak density at a first depth relative to the upper surface of said substrate; implanting at a non-perpendicular angle relative to said substrate at least one electrically neutral impurity into a channel region underlying a portion of said gate oxide and into a field region underlying a portion of said field oxide; and implanting arsenic into said substrate and within said lateral spaced distance to a concentration peak density at a second depth relative to the upper surface of said substrate, wherein said second depth is greater than said first depth.

Claim 2

A method for producing an NMOS device having reduced Drain Induced Barrier Lowering (DIBL) induced currents of short channel effects, the method comprising the steps of: placing boron into a surface region of a p-type substrate; growing a field oxide above said surface region upon said substrate; growing a gate oxide and patterning a polysilicon gate over said gate oxide a lateral spaced distance from said field oxide; implanting phosphorous into said substrate and within said lateral spaced distance to a concentration peak density at a first depth relative to the upper surface of said substrate; implanting at a non-perpendicular angle relative to said substrate at least one electrically neutral impurity into a channel region underlying a portion of said gate oxide and into a field region underlying a portion of said field oxide; and implanting arsenic into said substrate and within said lateral spaced distance to a concentration peak density at a second depth relative to the upper surface of said substrate, wherein said second depth is greater than said first depth.

Claim 10

A method for reducing diffusion and segregation of boron from a channel region and from a field region to adjacent source and drain regions within a semiconductor substrate, the method comprising the steps of: providing boron into a field region, wherein the field region resides within a substrate below a patterned field oxide; providing boron into a channel region laterally spaced from said field region, wherein said channel region resides within said substrate below a patterned polysilicon gate and a gate oxide; implanting germanium into a portion of said channel region at a non-perpendicular angle relative to said substrate, wherein a majority of the germanium resides less than 800 Angstroms below the surface of said substrate and between a middle portion of said channel region and subsequently placed source and drain regions, wherein said source and drain regions are placed between the channel region and the field region, whereby said germanium occupies a plurality of diffusion sites to reduce diffusion of boron from said channel region during a subsequent thermal annealing step; and simultaneously implanting germanium into said field region at a non-perpendicular angle relative to said substrate, wherein a majority of the germanium resides less than 800 Angstroms below the surface of said substrate and between said patterned field oxide and said subsequently placed source and drain regions, whereby said germanium occupies a plurality of diffusion sites to reduce diffusion of boron from said field region during a subsequent thermal annealing step.

Claim 11

A method for reducing diffusion and segregation of boron from a channel region and from a field region to adjacent source and drain regions within a semiconductor substrate, the method comprising the steps of: providing boron into a field region, wherein the field region resides within a substrate below a patterned field oxide; providing boron into a channel region laterally spaced from said field region, wherein said channel region resides within said substrate below a patterned polysilicon gate and a gate oxide; implanting germanium into a portion of said channel region at a non-perpendicular angle relative to said substrate, wherein a majority of the germanium resides less than 800 Angstroms below the surface of said substrate and between a middle portion of said channel region and subsequently placed source and drain regions, wherein said source and drain regions are placed between the channel region and the field region, whereby said germanium occupies a plurality of diffusion sites to reduce diffusion of boron from said channel region during a subsequent thermal annealing step; and simultaneously implanting germanium into said field region at a non-perpendicular angle relative to said substrate, wherein a majority of the germanium resides less than 800 Angstroms below the surface of said substrate and between said patterned field oxide and said subsequently placed source and drain regions, whereby said germanium occupies a plurality of diffusion sites to reduce diffusion of boron from said field region during a subsequent thermal annealing step.

Claim 16

A method for reducing diffusion and segregation of boron from a channel region and from a field region to adjacent source and drain regions in order to reduce Drain Induced Barrier Lowering (DIBL) induced currents of channel effects associated with boron diffusion and segregation from the channel and field regions, the method comprising the steps of: providing boron into a field region, wherein the field region resides within a substrate below a patterned field oxide; providing boron into a channel region laterally spaced from said field region, wherein said channel region resides within said substrate below a patterned polysilicon gate and a gate oxide; ionizing elemental germanium and accelerating a first portion of the germanium ions at a does less than 1×10 12 atoms/cm 2 at an implant energy of approximately 60 keV such that the concentration peak density of germanium atoms is implanted at a non-perpendicular angle into a portion of said channel region at a depth approximately equal to 700-800 Angstroms, wherein a majority of the germanium resides between a middle portion of said channel region and subsequently placed source and drain regions, wherein said source and drain regions are placed between the channel region and the field region, whereby said germanium occupies a plurality of diffusion sites to reduce diffusion of boron from said channel region during a subsequent thermal annealing step; and simultaneously implanting a second portion of the germanium ions at a dose less than 1×10 12 atoms/cm 2 at an implant energy of approximately 60 keV such that the concentration peak density of germanium atoms is implanted at a non-perpendicular angle into a portion of said field region at a depth approximately equal to 700-800 Angstroms, wherein a majority of the germanium resides between said patterned field region and said subsequently placed source and drain regions, whereby said germanium occupies a plurality of diffusion sites to reduce diffusion of boron from said field region during a subsequent thermal annealing step.

Claim 17

A method for reducing diffusion and segregation of boron from a channel region and from a field region to adjacent source and drain regions in order to reduce Drain Induced Barrier Lowering (DIBL) induced currents of channel effects associated with boron diffusion and segregation from the channel and field regions, the method comprising the steps of: providing boron into a field region, wherein the field region resides within a substrate below a patterned field oxide; providing boron into a channel region laterally spaced from said field region, wherein said channel region resides within said substrate below a patterned polysilicon gate and a gate oxide; ionizing elemental germanium and accelerating a first portion of the germanium ions at a does less than 1×10 12 atoms/cm 2 at an implant energy of approximately 60 keV such that the concentration peak density of germanium atoms is implanted at a non-perpendicular angle into a portion of said channel region at a depth approximately equal to 700-800 Angstroms, wherein a majority of the germanium resides between a middle portion of said channel region and subsequently placed source and drain regions, wherein said source and drain regions are placed between the channel region and the field region, whereby said germanium occupies a plurality of diffusion sites to reduce diffusion of boron from said channel region during a subsequent thermal annealing step; and simultaneously implanting a second portion of the germanium ions at a dose less than 1×10 12 atoms/cm 2 at an implant energy of approximately 60 keV such that the concentration peak density of germanium atoms is implanted at a non-perpendicular angle into a portion of said field region at a depth approximately equal to 700-800 Angstroms, wherein a majority of the germanium resides between said patterned field region and said subsequently placed source and drain regions, whereby said germanium occupies a plurality of diffusion sites to reduce diffusion of boron from said field region during a subsequent thermal annealing step.