Contact of a semiconductor device and its manufacturing process

Claim 1

A method for reducing the width of conducting line of semiconductor device comprising the steps of: forming a first conducting line on a semiconductor substrate which has a field oxide and an exposed region formed by an opening in the field oxide, wherein said first conducting line is formed in said exposed region; forming a first insulating layer over the top of said first conducting line and semiconductor substrate; depositing a second conducting layer over the top of said first insulating layer and forming a second conducting line through a patterning process using a mask for the second conducting layer, said second conducting line being parallel to said first conducting line and having a width over at least a portion of its length that is no greater than the width of the underlying first conducting line; forming a second insulating layer over the semiconductor substrate; forming a photoresist pattern for a contact mask on the second insulating layer; etching a contact area in the second insulating layer by using said photoresist pattern as a mask to expose the second conducting line in the portion of its length that is no wider than the underlying first conducting line; sequentially etching the second conducting line and the first insulating layer that had been exposed at the contact area to create a contact hole that exposes a portion of the first conducting line; removing the photoresist pattern; and filling a third conducting layer for contact plug into the contact hole in order to make the first conducting line contact with the second conducting line.

Claim 2

A method for reducing the width of conducting line of semiconductor device comprising the steps of: forming a first conducting line on a semiconductor substrate which has a field oxide and an exposed region formed by an opening in the field oxide, wherein said first conducting line is formed in said exposed region; forming a first insulating layer over the top of said first conducting line and semiconductor substrate; depositing a second conducting layer over the top of said first insulating layer and forming a second conducting line through a patterning process using a mask for the second conducting layer, said second conducting line being parallel to said first conducting line and having a width over at least a portion of its length that is no greater than the width of the underlying first conducting line; forming a second insulating layer over the semiconductor substrate; forming a photoresist pattern for a contact mask on the second insulating layer; etching a contact area in the second insulating layer by using said photoresist pattern as a mask to expose the second conducting line in the portion of its length that is no wider than the underlying first conducting line; sequentially etching the second conducting line and the first insulating layer that had been exposed at the contact area to create a contact hole that exposes a portion of the first conducting line; removing the photoresist pattern; and filling a third conducting layer for contact plug into the contact hole in order to make the first conducting line contact with the second conducting line.