Method of producing conductive pillars in semiconductor device

Claim 1

A method of manufacturing a semiconductor device, which method comprises providing an organic polymer layer on a major surface of a semiconductor body, which major surface has adjacent thereto a device region bounded by an insulating region also adjacent to said major surface, by applying a layer of a flowable carbon-containing organic polymer, easily etchable in a plasma containing mostly oxygen, on said major surface, providing a masking layer over and in contact with the layer of the organic polymer, etching the layer of the organic polymer selectively with respect to the underlying device region and insulating region through a window in the masking layer with said plasma to form an opening exposing a contact area of a device region, depositing electrically conducting material in the opening to form a conductive pillar contacting the contact area, removing the remaining portions of the layer of the organic polymer thereby to expose side surfaces of said pillar, providing a layer of insulating material other than the layer of organic polymer to contact and to cover the pillar, etching the layer of insulating material to expose a top surface of the pillar and depositing electrically conductive material to contact the pillar.

Claim 2

A method of manufacturing a semiconductor device, which method comprises providing an organic polymer layer on a major surface of a semiconductor body, which major surface has adjacent thereto a device region bounded by an insulating region also adjacent to said major surface, by applying a layer of a flowable carbon-containing organic polymer, easily etchable in a plasma containing mostly oxygen, on said major surface, providing a masking layer over and in contact with the layer of the organic polymer, etching the layer of the organic polymer selectively with respect to the underlying device region and insulating region through a window in the masking layer with said plasma to form an opening exposing a contact area of a device region, depositing electrically conducting material in the opening to form a conductive pillar contacting the contact area, removing the remaining portions of the layer of the organic polymer thereby to expose side surfaces of said pillar, providing a layer of insulating material other than the layer of organic polymer to contact and to cover the pillar, etching the layer of insulating material to expose a top surface of the pillar and depositing electrically conductive material to contact the pillar.

Claim 8

A method of manufacturing a semiconductor device, which method comprises providing a nucleation layer on a major surface of a semiconductor body, which major surface has adjacent thereto a device region bounded by an insulating region also adjacent to said major surface, applying a layer of a flowable carbon-containing organic polymer easily etchable in a plasma containing mostly oxygen on said nucleation layer, providing a masking layer over and in contact with the layer of the organic polymer, etching the layer of the organic polymer selectively with respect to the underlying device region and insulating region through a window in a masking layer with said plasma to form an opening exposing a contact area of a device region, depositing tungsten in the opening to form a conductive pillar contacting the contact area, removing the remaining portions of the layer of the organic polymer to thereby expose side surfaces of the pillar, providing a layer of a non-polymeric insulating material to contact and cover the pillar, etching the layer of the insulating material to expose a top surface of the pillar and depositing electrically conductive material to contact the pillar.

Claim 9

A method of manufacturing a semiconductor device, which method comprises providing a nucleation layer on a major surface of a semiconductor body, which major surface has adjacent thereto a device region bounded by an insulating region also adjacent to said major surface, applying a layer of a flowable carbon-containing organic polymer easily etchable in a plasma containing mostly oxygen on said nucleation layer, providing a masking layer over and in contact with the layer of the organic polymer, etching the layer of the organic polymer selectively with respect to the underlying device region and insulating region through a window in a masking layer with said plasma to form an opening exposing a contact area of a device region, depositing tungsten in the opening to form a conductive pillar contacting the contact area, removing the remaining portions of the layer of the organic polymer to thereby expose side surfaces of the pillar, providing a layer of a non-polymeric insulating material to contact and cover the pillar, etching the layer of the insulating material to expose a top surface of the pillar and depositing electrically conductive material to contact the pillar.

Claim 10

A method of manufacturing a semiconductor device, which method comprises providing a semiconductor body having adjacent one major surface at least one device region, an insulating gate structure adjacent said major surface and bounding said at least one device region to define at least one insulated gate field effect transistor and an insulating capping layer covering the insulated gate structure so as to encapsulate and thereby electrically insulate the insulated gate structure, and providing an electrical connection to at least the one device region by applying a polyimide to form a layer on the one major surface, forming a masking layer over the polyimide layer, etching the polyimide layer selectively with respect to the underlying at least one device region and the insulating capping layer through a window in the masking layer with a plasma containing mostly oxygen to form an opening exposing a contact area of the at least one device region, depositing tungsten to form within said opening a conductive pillar contacting said contact area, removing the polyimide layer so as to expose side surfaces of said conductive pillar, providing a layer of silicon oxide to cover said conductive pillar, etching the silicon oxide layer to expose a top surface of said pillar and depositing electrically conductive material to contact said conductive pillar.

Claim 11

A method of manufacturing a semiconductor device, which method comprises providing a semiconductor body having adjacent one major surface at least one device region, an insulating gate structure adjacent said major surface and bounding said at least one device region to define at least one insulated gate field effect transistor and an insulating capping layer covering the insulated gate structure so as to encapsulate and thereby electrically insulate the insulated gate structure, and providing an electrical connection to at least the one device region by applying a polyimide to form a layer on the one major surface, forming a masking layer over the polyimide layer, etching the polyimide layer selectively with respect to the underlying at least one device region and the insulating capping layer through a window in the masking layer with a plasma containing mostly oxygen to form an opening exposing a contact area of the at least one device region, depositing tungsten to form within said opening a conductive pillar contacting said contact area, removing the polyimide layer so as to expose side surfaces of said conductive pillar, providing a layer of silicon oxide to cover said conductive pillar, etching the silicon oxide layer to expose a top surface of said pillar and depositing electrically conductive material to contact said conductive pillar.