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EP0195977A2 Expired / Lapsed EP ⏱️ 0.0 years remaining

Metal interconnection system with a planar surface

Assignee: HP Inc
•
Filing: 1986-03-11
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Granted: —
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Expires: 2006-03-11
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Abstract

Abstract 7A process for electrically interconnecting electronic devices (1, 2) located on a surface with planar layers of conductors and dielectrics comprises the following steps: a) depositing a dielectric (9) on the surface of said electronic devices; b) removing the dielectric (9) at selective locations where the interconnections (10) are to be made; c) depositing a conductor only where the dielectric (9) was selectively removed in the previous step; and d) repeating the steps of depositing a dielectric (9), removing the dielectric deposited in the previous step at selective locations (10), and depositing a conductor where the dielectric was selectively removed. This process results in electronic devices having essentially flat layers and thus leads to a higher yield of such devices having an improved reliability (Figure 10).

Inventors

  • 👤 Robert B. Manley
  • 👤 Mark D. Crook

Bibliographic Details

Application Number —
Jurisdiction EP
Data Source google_patents
Last Synchronized 2026-10-31 12:54
CPC Classifications
H; H10; H10W; H10W20/00; H10W20/01; H10W20/031; H10W20/056; H10W20/057; H10W20/40; H10W20/41; H10W20/42; H10W20/421; H10W20/0698

Claims Analysis

Total Claims: 10
Claim 1
Independent Claim 84 words
A process for electrically interconnecting electronic devices located on a surface with planar layers of conductors and dielectrics, the process comprising: depositing a dielectric on the surface; at-least partially removing the dielectric at selective.locations where the interconnections are to be made; depositing a conductor only where the dielectric was selectively removed in the previous step; and repeating the steps of depositing a dielectric, removing the dielectric deposited in the previous step at selective locations, and depositing a conductor where the dielectric was selectively removed.
Claim 2
Dependent Claim 84 words
A process for electrically interconnecting electronic devices located on a surface with planar layers of conductors and dielectrics, the process comprising: depositing a dielectric on the surface; at-least partially removing the dielectric at selective.locations where the interconnections are to be made; depositing a conductor only where the dielectric was selectively removed in the previous step; and repeating the steps of depositing a dielectric, removing the dielectric deposited in the previous step at selective locations, and depositing a conductor where the dielectric was selectively removed.
Claim 3
Dependent Claim 13 words
A process as in claim 1 wherein the dielectric is a spin-on polymer.
Claim 4
Dependent Claim 16 words
A process as in claim 1 or 2 wherein the dielectric is an oxide of silicon.
Claim 5
Dependent Claim 15 words
A process as in any one of the preceding claims wherein the conductor is tungsten.
Claim 6
Dependent Claim 41 words
A process as in any one of the preceding claims, wherein the step of depositing a conductor comprises: deactivating the exposed side of the dielectric; and depositing the conductor on the surface of the dielectric except where the surface is deactivated.
Claim 7
Dependent Claim 36 words
A process as in anyone of claims 1 to 4 wherein the step of selectively depositing the conductor comprises: activating the locations where the dielectric was selectively removed; and depositing the conductor in the activated locations.
Claim 8
Dependent Claim 29 words
A process as in claims 5 or 6 wherein the step of depositing the conductor comprises exposing the surface to a gas containing WF 6 and H 2 .
Claim 9
Dependent Claim 32 words
A process as in claim 5 wherein the step of deactivating the surface of the dielectric comprises the depositing of compound selected from the group consisting of silicon dioxide and silicon nitride.
Claim 10
Dependent Claim 40 words
A process as in any one of the preceding claims further comprising repeating the steps of depositing a dielectric, removing the dielectric deposited in the previous step at selective locations, and depositing a conductor where the dielectric was selectively removed.

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