Patent US5349239A successfully refreshed from Google Patents.
US5349239A
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US
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Vertical type construction transistor
Assignee: Sharp Corp
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Filing: 1992-07-02
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Granted: 1994-09-20
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Expires: 2012-07-02
Abstract
Abstract A vertical type construction transistor is provided wherein a bump electrode is disposed immediately on the junction portions formed on the surface of the semiconductor basic plate so as to effect a radiating operation with the electrode being connected to a heat sink. As a result the heating of the junction portion formed on the basic plate surface is effectively released, the inductance of the outgoing line is reduced, and the power amplification used in the microwave band is put to practical use.
Inventors
- 👤 Hiroya Sato
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-07 06:04
CPC Classifications
H; H10; H10W; H10W20/00; H10W20/40; H10W20/482; H10W20/484; H10W72/00; H10W72/20; H10W72/251; H10W72/29; H10W72/90; H10W72/921; H10W72/923; H10W72/9232
Claims Analysis
Total Claims: 6
Claim 1
Independent Claim
113 words
A vertical type construction transistor comprising: a semiconductor basic plate; a junction portion formed on a surface of said semiconductor basic plate, said junction portion including a boundary of an emitter region provided within a base region; and a bump electrode provided immediately on said junction portion, said emitter region being of a size in approximate conformity with a width of said bump electrode and said emitter region being divided into a plurality of short strips of finger portions arranged in parallel with a size in a longitudinal direction of said finger portions and said width of said bump electrode in said longitudinal direction being set in a range of 5 μm-40 μm.
Claim 2
Dependent Claim
113 words
A vertical type construction transistor comprising: a semiconductor basic plate; a junction portion formed on a surface of said semiconductor basic plate, said junction portion including a boundary of an emitter region provided within a base region; and a bump electrode provided immediately on said junction portion, said emitter region being of a size in approximate conformity with a width of said bump electrode and said emitter region being divided into a plurality of short strips of finger portions arranged in parallel with a size in a longitudinal direction of said finger portions and said width of said bump electrode in said longitudinal direction being set in a range of 5 μm-40 μm.
Claim 3
Dependent Claim
21 words
A vertical type construction transistor as defined in claim 1, wherein said bump electrode comprises gold or a metal including gold.
Claim 4
Independent Claim
117 words
A method for forming a vertical type construction transistor, comprising the steps of: (a) forming a junction portion on a surface of a semiconductor basic plate; (b) providing a boundary of an emitter region within a base region of said junction portion; (c) providing a bump electrode immediately on said junction portion; (d) approximately conforming a size of said emitter region with a width of said bump electrode; and (e) dividing said emitter region into a plurality of short strips of finger portions arranged in parallel with a size in a longitudinal direction of said finger portions and said width of said bump electrode in said longitudinal direction being set in a range of 5 μm-40 μm.
Claim 5
Independent Claim
117 words
A method for forming a vertical type construction transistor, comprising the steps of: (a) forming a junction portion on a surface of a semiconductor basic plate; (b) providing a boundary of an emitter region within a base region of said junction portion; (c) providing a bump electrode immediately on said junction portion; (d) approximately conforming a size of said emitter region with a width of said bump electrode; and (e) dividing said emitter region into a plurality of short strips of finger portions arranged in parallel with a size in a longitudinal direction of said finger portions and said width of said bump electrode in said longitudinal direction being set in a range of 5 μm-40 μm.
Claim 6
Dependent Claim
25 words
A method for forming a vertical type construction transistor as defined in claim 3, wherein said bump electrode comprises gold or a metal including gold.
References Cited (Backward Citations)
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1997-09-19 | 1998-03-21 | 1998-09-20 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2001-09-19 | 2002-03-21 | 2002-09-20 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2005-09-19 | 2006-03-21 | 2006-09-20 | $7700.00 | Window Closed / Lapsed |