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US5346857A
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Method for forming a flip-chip bond from a gold-tin eutectic
Assignee: NXP USA Inc
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Filing: 1992-09-28
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Granted: 1994-09-13
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Expires: 2012-09-28
Abstract
Abstract A method for flip-chip bonding an integrated circuit die to a substrate. A substrate (21) having conductive bonding areas (22) coated with tin (23) is secured to a bottom end effector of a flip-chip bonding apparatus. An integrated circuit die (26) having gold bumps (28) is secured to a die tool of the flip-chip bonding apparatus. A gold-tin eutectic bond is formed between the integrated circuit die (26) and the conductive bonding areas (22) of the substrate (21).
Inventors
- 👤 Thomas A. Scharr
- 👤 Russell T. Lee
- 👤 Ravichandran Subrahmanyan
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-04 23:13
CPC Classifications
H; H10; H10W; H10W72/00; H10W72/071; H10W72/072; H10W72/0711; H10W72/07141; H10W72/07231; H10W72/07235; H10W72/07236; H10W72/07251; H10W72/20; H10W72/251; H10W72/252
Claims Analysis
Total Claims: 14
Claim 1
Independent Claim
68 words
A method for forming a flip-chip bond from a gold-tin eutectic, comprising the steps of: providing a semiconductor integrated circuit having at least one gold bump; providing a substrate having at least one conductive bonding area, the at least one conductive bonding area coated with tin; and flip-chip bonding the at least one gold bump with the at least one conductive bonding area to form the gold-tin eutectic.
Claim 2
Independent Claim
68 words
A method for forming a flip-chip bond from a gold-tin eutectic, comprising the steps of: providing a semiconductor integrated circuit having at least one gold bump; providing a substrate having at least one conductive bonding area, the at least one conductive bonding area coated with tin; and flip-chip bonding the at least one gold bump with the at least one conductive bonding area to form the gold-tin eutectic.
Claim 3
Dependent Claim
37 words
A method for forming a flip-chip bond from a gold-tin eutectic as claimed in claim 1 wherein the step of providing a semiconductor integrated circuit includes providing the semiconductor integrated circuit in a gallium arsenide semiconductor substrate.
Claim 4
Dependent Claim
31 words
A method of forming a flip-chip bond from a gold-tin eutectic as claimed in claim 1 wherein the step of providing a substrate includes providing a substrate of an organic material.
Claim 5
Dependent Claim
29 words
A method for forming a flip-chip bond from a gold-tin eutectic as claimed in claim 3 wherein the step of providing a substrate includes providing a substrate comprising polyimide.
Claim 6
Dependent Claim
29 words
A method for forming a flip-chip bond from a gold-tin eutectic as claimed in claim 3 wherein the step of providing a substrate includes providing a substrate comprising FR-4.
Claim 7
Dependent Claim
31 words
A method for forming a flip-chip bond from a gold-tin eutectic as claimed in claim 1 wherein the step of providing a substrate includes providing a substrate comprising a ceramic material.
Claim 8
Dependent Claim
80 words
A method for forming a flip-chip bond from a gold-tin eutectic as claimed in claim 1 wherein the step of flip-chip bonding comprises: heating the substrate at approximately 50° C. per second to a temperature ranging between approximately 280° C. and 315° C.; and providing a compression load ranging between approximately 3 and 5 grams per bump, wherein the compression load serves to establish contact between the at least one gold bump and the at least one conductive bonding area.
Claim 9
Dependent Claim
79 words
A flip-chip method for bonding a semiconductor integrated circuit to a circuit board, comprising the steps of: providing a semiconductor integrated circuit having a plurality of gold bumps; providing a circuit board having a plurality of bonding areas, the plurality of bonding areas coated with tin and patterned to mate with the plurality of gold bumps; flip-chip bonding the plurality of gold bumps with the plurality of bonding areas wherein the step of flip-chip bonding forms a gold-tin eutectic.
Claim 10
Dependent Claim
79 words
A flip-chip method for bonding a semiconductor integrated circuit to a circuit board, comprising the steps of: providing a semiconductor integrated circuit having a plurality of gold bumps; providing a circuit board having a plurality of bonding areas, the plurality of bonding areas coated with tin and patterned to mate with the plurality of gold bumps; flip-chip bonding the plurality of gold bumps with the plurality of bonding areas wherein the step of flip-chip bonding forms a gold-tin eutectic.
Claim 11
Dependent Claim
60 words
A flip-chip method for bonding a semiconductor integrated circuit to a circuit board as claimed in claim 8 wherein the step of flip-chip bonding includes: providing a temperature between approximately 280° C. and 315° C.; and providing a compression load ranging between approximately 3 and 5 grams per bump for a time ranging between substantially 3 seconds and 10 seconds.
Claim 12
Dependent Claim
35 words
A flip-chip method for bonding a semiconductor integrated circuit to a circuit board as claimed in claim 8 wherein the step of providing a semiconductor integrated circuit includes providing a gallium arsenide semiconductor integrated circuit.
Claim 13
Dependent Claim
32 words
A flip-chip method for bonding a semiconductor integrated circuit to a circuit board as claimed in claim 8 wherein the step of providing a circuit board includes providing an FR-4 circuit board.
Claim 14
Dependent Claim
32 words
A flip-chip method for bonding a semiconductor integrated circuit to a circuit board as claimed in claim 8 wherein the step of providing a circuit board includes providing a polyimide circuit board.
References Cited (Backward Citations)
US3874072A
Cited
US4129042A
Cited
US4887760A
Cited
US5108950A
Cited
US5008997A
Cited
US4922322A
Cited
US5090609A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1997-09-12 | 1998-03-14 | 1998-09-13 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2001-09-12 | 2002-03-14 | 2002-09-13 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2005-09-12 | 2006-03-14 | 2006-09-13 | $7700.00 | Window Closed / Lapsed |