US5341325A
Expired / Lapsed
US
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Ferroelectric memory device with crosstalk protection in reading/writing operation
Assignee: Olympus Corp
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Filing: 1992-11-05
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Granted: 1994-08-23
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Expires: 2012-11-05
Abstract
Abstract A plurality of memory cells are constituted by a large number of belt-like first conductive members, a ferroelectric thin film formed on the first conductive members, and a large number of belt-like second conductive members formed on the film in a direction perpendicular to the first conductive members. A reading/writing section performs a reading/writing operation with respect to each memory cell after applying a predetermined voltage to at least memory cells other than a target memory cell to cause ferroelectric polarization corresponding to crosstalk components. A two-terminal switch integrally stacked on each of the memory cells serves to reduce dielectric polarization for the elimination of crosstalk caused in each memory cell.
Inventors
- 👤 Hiroshi Nakano
- 👤 Yasuo Isono
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-04 06:01
CPC Classifications
G; G11; G11C; G11C11/00; G11C11/21; G11C11/22
Claims Analysis
Total Claims: 16
Claim 1
Independent Claim
112 words
A ferroelectric memory device comprising: a matrix memory cell array comprising a plurality of belt-like first conductive members, a plurality of belt-like second conductive members arranged in a direction perpendicular to said first conductive members, respectively, and ferroelectric capacitors formed at nodes of said first conductive members and said second conductive members, respectively; precedent voltage-applying means for applying a non-zero voltage with the same polarity as that of a reading/writing voltage, to said matrix memory cell array, prior to a reading/writing operation; and means for subsequently executing the reading/writing operation with respect to an addressed memory cell of said matrix memory cell array following the precedent voltage-application of said precedent voltage-applying means.
Claim 2
Dependent Claim
112 words
A ferroelectric memory device comprising: a matrix memory cell array comprising a plurality of belt-like first conductive members, a plurality of belt-like second conductive members arranged in a direction perpendicular to said first conductive members, respectively, and ferroelectric capacitors formed at nodes of said first conductive members and said second conductive members, respectively; precedent voltage-applying means for applying a non-zero voltage with the same polarity as that of a reading/writing voltage, to said matrix memory cell array, prior to a reading/writing operation; and means for subsequently executing the reading/writing operation with respect to an addressed memory cell of said matrix memory cell array following the precedent voltage-application of said precedent voltage-applying means.
Claim 3
Dependent Claim
32 words
A ferroelectric memory device according to claim 1, wherein said precedent voltage-applying means applies a predetermined non-zero voltage to memory cells other than the addressed memory cell prior to the reading/writing operation.
Claim 4
Dependent Claim
33 words
A ferroelectric memory device according to claim 1, wherein said precedent voltage-applying means applies a predetermined non-zero voltage to all memory cells of said matrix memory cell array prior to the reading/writing operation.
Claim 5
Dependent Claim
20 words
A ferroelectric memory device according to claim 1, wherein said precedent voltage-applying means includes a dummy cell with ferroelectric characteristics.
Claim 6
Dependent Claim
18 words
A ferroelectric memory device according to claim 4, wherein said dummy cell is formed of a dielectric member.
Claim 7
Dependent Claim
31 words
A ferroelectric memory device according to claim 1, wherein said precedent voltage-applying means includes power supply means for applying a predetermined voltage to each memory cell of said-matrix memory cell array.
Claim 8
Dependent Claim
38 words
A ferroelectric memory device according to claim 1, wherein said precedent voltage-applying means applies a voltage with a value at least equal to that of a crosstalk voltage, to each memory cell of said matrix memory cell array.
Claim 9
Dependent Claim
30 words
A ferroelectric memory device according to claim 1, wherein each memory cell of said matrix memory cell array has a two-terminal switch section connected in series to said ferroelectric capacitor.
Claim 10
Dependent Claim
62 words
A ferroelectric memory device according to claim 8, wherein said two-terminal switch section comprises an MIM tunnel switching element which exhibits a bipolarity and is of a three-layer structure fabricated by a metal (M), an insulation (I), and another metal (M), said ferroelectric capacitor comprising a ferroelectric member stacked on one of the two metals (M) of said MIM tunnel switching element.
Claim 11
Dependent Claim
17 words
A ferroelectric memory device according to claim 8, wherein said two-terminal switch section includes a bidirectional diode.
Claim 12
Independent Claim
131 words
A method for executing a reading/writing operation in a ferroelectric memory device, said method comprising the steps of: preparing a matrix memory cell array in which a plurality of belt-like first conductive members, a plurality of belt-like second conductive members and ferroelectric capacitors are arranged in a matrix manner, said second conductive members being arranged in a direction perpendicular to said first conductive members, respectively, and said ferroelectric capacitors being formed at nodes of said first conductive members and said second conductive members, respectively; precedently-applying a non-zero voltage with the same polarity as that of a reading/writing voltage to said matrix memory cell array prior to a reading/writing operation; and subsequently executing the reading/writing operation for an addressed memory cell of said matrix memory cell array following said precedent voltage-applying step.
Claim 13
Independent Claim
131 words
A method for executing a reading/writing operation in a ferroelectric memory device, said method comprising the steps of: preparing a matrix memory cell array in which a plurality of belt-like first conductive members, a plurality of belt-like second conductive members and ferroelectric capacitors are arranged in a matrix manner, said second conductive members being arranged in a direction perpendicular to said first conductive members, respectively, and said ferroelectric capacitors being formed at nodes of said first conductive members and said second conductive members, respectively; precedently-applying a non-zero voltage with the same polarity as that of a reading/writing voltage to said matrix memory cell array prior to a reading/writing operation; and subsequently executing the reading/writing operation for an addressed memory cell of said matrix memory cell array following said precedent voltage-applying step.
Claim 14
Dependent Claim
29 words
A method according to claim 11, wherein said precedent voltage-applying step is performed for memory cells other than the addressed memory cell to be accessed in the reading/writing operation.
Claim 15
Dependent Claim
23 words
A method according to claim 11, wherein said precedent voltage-applying step is performed for all memory cells of said matrix memory cell array.
Claim 16
Dependent Claim
30 words
A method according to claim 11, wherein the voltage of said precedent voltage-applying step is a predetermined voltage having a value at least equal to that of a crosstalk voltage.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1997-08-22 | 1998-02-21 | 1998-08-23 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2001-08-22 | 2002-02-21 | 2002-08-23 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2005-08-22 | 2006-02-21 | 2006-08-23 | $7700.00 | Window Closed / Lapsed |