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US5339262A
Expired / Lapsed
US
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Method and apparatus for interim, in-situ testing of an electronic system with an inchoate ASIC
Assignee: LSI Corp
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Filing: 1992-07-10
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Granted: 1994-08-16
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Expires: 2012-07-10
Abstract
Abstract A technique for testing the performance of a target electronic system ultimately employing an ASIC comprising a core cell and surrounding logic, using an inchoate (designed, but not yet fabricated) ASIC on an interim basis. In one embodiment, a Q-part, or qualification part, which is essentially a bond-out of the core cell, is used in conjunction with programmable logic devices configured to perform the function of the surrounding logic. The Q-part and programmable logic are interconnected on a pod, and plugged into an interim version of a target electronic system. In another embodiment, the Q-part is software-simulated and interconnected on the pod to programmable logic devices. The programmable logic devices may be programmed either on-pod or off-pod, and signals incident to the operation of the pod plugged into the interim electronic system can be monitored and controlled.
Inventors
- 👤 Michael D. Rostoker
- 👤 David Gluss
- 👤 Tom Harrington
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-31 20:21
CPC Classifications
G; G06; G06F; G06F11/00; G06F11/22; G06F11/26; G06F11/261; G06F30/00; G06F30/30; G06F30/32; G06F30/33
Claims Analysis
Total Claims: 23
Claim 1
Independent Claim
193 words
A method of testing the performance of a target electronic system ultimately employing an ASIC comprising a core cell and surrounding logic, comprising: constructing an interim electronic system, said interim electronic system including features of a target electronic system that will, when built, employ an ASIC having a core cell and surrounding logic, said interim electronic system lacking the ASIC and the ASIC'S functionality, said interim electronic system including a socket in lieu of the ASIC; plugging a pod into the socket, said pod including a plug for plugging into the socket, a functional model of the ASIC core cell, one or more programmable logic devices, and connections between the programmable logic devices; and configuring the programmable logic devices to perform the functions of logic surrounding the core cell in the ASIC; with the pod connected to the interim electronic system, exercising and verifying the intended functionality of the target electronic system by operating the interim electronic system, observing electrical (functional) responses of the interim electronic system as it is being operated and comparing the responses of the interim electronic system with a set of anticipated responses for the intended target electronic system.
Claim 2
Independent Claim
193 words
A method of testing the performance of a target electronic system ultimately employing an ASIC comprising a core cell and surrounding logic, comprising: constructing an interim electronic system, said interim electronic system including features of a target electronic system that will, when built, employ an ASIC having a core cell and surrounding logic, said interim electronic system lacking the ASIC and the ASIC'S functionality, said interim electronic system including a socket in lieu of the ASIC; plugging a pod into the socket, said pod including a plug for plugging into the socket, a functional model of the ASIC core cell, one or more programmable logic devices, and connections between the programmable logic devices; and configuring the programmable logic devices to perform the functions of logic surrounding the core cell in the ASIC; with the pod connected to the interim electronic system, exercising and verifying the intended functionality of the target electronic system by operating the interim electronic system, observing electrical (functional) responses of the interim electronic system as it is being operated and comparing the responses of the interim electronic system with a set of anticipated responses for the intended target electronic system.
Claim 3
Dependent Claim
16 words
The method of claim 1, wherein: the functional model of the core cell is a Q-part.
Claim 4
Dependent Claim
21 words
The method of claim 1, wherein: the functional model of the core cell is a software simulation of the core cell.
Claim 5
Dependent Claim
34 words
The method of claim 1, further comprising: configuring selected connections between the functional model of the core cell, the programmable logic devices, and the plug with jumpers in a patch area on the pod.
Claim 6
Dependent Claim
15 words
The method of claim 1, further comprising: connecting between the pod and external electronic equipment.
Claim 7
Dependent Claim
13 words
The method of claim 5, further comprising: monitoring selected signals on the pod.
Claim 8
Dependent Claim
19 words
The method of claim 6, further comprising: connecting the selected signals to the functional model of the core cell.
Claim 9
Dependent Claim
16 words
The method of claim 6, further comprising: connecting the selected signals to the programmable logic devices.
Claim 10
Dependent Claim
14 words
The method of claim 6, further comprising: connecting the selected signals to the plug.
Claim 11
Dependent Claim
36 words
The method of claim 5, wherein: the connections between the pod and the external electronic equipment are further connected on the pod such that configuration of the programmable logic devices may be accomplished under external control.
Claim 12
Independent Claim
85 words
A method of simulating the performance of an inchoate ASIC having a core cell and surrounding logic, comprising: providing a pod having a functional model of the core cell, programmable logic devices, a plug whose pine configuration matches that of the inchoate ASIC, and connections between the programmable logic devices, the functional model, and the plug; configuring the programmable logic devices as surrogate surrounding logic; and operating the pod to perform in a manner which is functionally equivalent to the performance of the inchoate ASIC.
Claim 13
Independent Claim
85 words
A method of simulating the performance of an inchoate ASIC having a core cell and surrounding logic, comprising: providing a pod having a functional model of the core cell, programmable logic devices, a plug whose pine configuration matches that of the inchoate ASIC, and connections between the programmable logic devices, the functional model, and the plug; configuring the programmable logic devices as surrogate surrounding logic; and operating the pod to perform in a manner which is functionally equivalent to the performance of the inchoate ASIC.
Claim 14
Dependent Claim
16 words
The method of claim 11, wherein: the functional model of the core cell is a Q-part.
Claim 15
Dependent Claim
38 words
The method of claim 11, wherein: the functional model of the core cell is a software simulation of the core cell, physically connected to the pod via a hardware emulation system providing a functional equivalent to a Q-part.
Claim 16
Dependent Claim
125 words
Apparatus for testing the performance of a target electronic system ultimately employing an ASIC comprising a core cell and surrounding logic, using an inchoate ASIC on an interim basis, comprising: an interim electronic system, equivalent to the target electronic system without the inchoate ASIC; a socket on the interim electronic system carrying all connections to the inchoate ASIC; a separate pod having a plug for plugging into the socket, said pod further comprising: a functional model of the core cell; at least one programmable logic device, said programmable logic device(s) configured as surrogate surrounding logic; means for providing connections between the programmable logic device)s), the functional model of the core cell, and the plug; and means for plugging the pod into the interim electronic system.
Claim 17
Dependent Claim
125 words
Apparatus for testing the performance of a target electronic system ultimately employing an ASIC comprising a core cell and surrounding logic, using an inchoate ASIC on an interim basis, comprising: an interim electronic system, equivalent to the target electronic system without the inchoate ASIC; a socket on the interim electronic system carrying all connections to the inchoate ASIC; a separate pod having a plug for plugging into the socket, said pod further comprising: a functional model of the core cell; at least one programmable logic device, said programmable logic device(s) configured as surrogate surrounding logic; means for providing connections between the programmable logic device)s), the functional model of the core cell, and the plug; and means for plugging the pod into the interim electronic system.
Claim 18
Dependent Claim
16 words
The apparatus of claim 14, wherein: the functional model of the core cell is a Q-part.
Claim 19
Dependent Claim
38 words
The apparatus of claim 14, wherein: the functional model of the core cell is a software simulation of the core cell, physically connected to the pod via a hardware emulation system providing a functional equivalent to a Q-part.
Claim 20
Dependent Claim
34 words
The apparatus of claim 14, further comprising: a patch area on the pod including jumpering means for configuring selected connections between the functional model of the core cell, the programmable logic, and the plug.
Claim 21
Dependent Claim
12 words
The apparatus of claim 17, wherein: said jumpering means is jumper wires.
Claim 22
Dependent Claim
14 words
The apparatus of claim 17, wherein: said jumpering means is a mechanical cross-point switch.
Claim 23
Dependent Claim
14 words
The apparatus of claim 17, wherein: said jumpering means is an electronic cross-point switch.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1997-08-15 | 1998-02-14 | 1998-08-16 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2001-08-15 | 2002-02-14 | 2002-08-16 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2005-08-15 | 2006-02-14 | 2006-08-16 | $7700.00 | Window Closed / Lapsed |