US5253181A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Programmable one-board computer, and methods of verification of logic circuit and alteration to actual circuit using the programmable one-board computer
Assignee: Kawasaki Microelectronics Inc
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Filing: 1990-04-24
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Granted: 1993-10-12
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Expires: 2010-04-24
Abstract
Abstract There is provided a programmable one-board computer comprising a system board including wirings, one or more of microprocessor chips disposed at the center of said system board, and a plurality of programmable logic devices (PLD) disposed to surround said one or more of the microprocessor chips. Each said PLD may include a memory for defining an internal circuit thereof or may substitute partly thereof for an external memory device, or said PLDs may be comprised of large scale PLDs as inner PLDs thereof and small scale PLDs as outer PLDs thereof. The programmable one-board computer can realize an actual circuit altered from a newly designed logic circuit and laid out on the same. The actual circuit laid on the same can be used for verification.
Inventors
- 👤 Tomohiro Marui
- 👤 Yoshihiro Ishida
- 👤 Hiroyuki Oka
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-31 07:44
CPC Classifications
G; G06; G06F; G06F9/00; G06F9/06; G06F30/00; G06F30/30; G06F30/32; G06F30/33; G06F30/3308; G06F30/331
Claims Analysis
Total Claims: 18
Claim 1
Independent Claim
64 words
A programmable one-board computer comprising: (a) a system board having a plurality of wirings; (b) at least one microprocessor chip disposed substantially at the center of said system board; and (c) a plurality of programmable logic devices substantially surrounding said microprocessor chip, said plurality of wirings interconnecting at least one of said plurality of programmable logic devices to said at least one microprocessor chip.
Claim 2
Dependent Claim
64 words
A programmable one-board computer comprising: (a) a system board having a plurality of wirings; (b) at least one microprocessor chip disposed substantially at the center of said system board; and (c) a plurality of programmable logic devices substantially surrounding said microprocessor chip, said plurality of wirings interconnecting at least one of said plurality of programmable logic devices to said at least one microprocessor chip.
Claim 3
Dependent Claim
23 words
A programmable one-board computer according to claim 1 further comprising memory devices for defining internal circuits of said plurality of programmable logic devices.
Claim 4
Dependent Claim
26 words
A programmable one-board computer according to claim 1 wherein at least one of said plurality of programmable logic devices has a memory for a computer system.
Claim 5
Dependent Claim
35 words
A programmable one-board computer according to claim 1 further comprising at least one memory coupled to at least one of said plurality of programmable logic devices by said plurality of wirings for a computer system.
Claim 6
Dependent Claim
19 words
The programmable one-board computer of claim 1, wherein said plurality of wirings intercouple said plurality of programmable logic devices.
Claim 7
Dependent Claim
124 words
A programmable one-board computer comprising: (a) a system board having a plurality of wirings; (b) at least one microprocessor chip disposed substantially at the center of said system board; (c) a plurality of large scale programmable logic devices disposed on said system board to substantially surround the circumference of said microprocessor chip, said plurality of wirings interconnecting at least one of said plurality of large scale programmable logic devices to said at least one microprocessor chip; and (d) a plurality of small scale programmable logic devices disposed outside said large scale programmable logic devices, said plurality of wiring interconnecting at least one of said plurality of small scale programmable logic devices to at least one of said plurality of large scale programmable logic devices.
Claim 8
Dependent Claim
124 words
A programmable one-board computer comprising: (a) a system board having a plurality of wirings; (b) at least one microprocessor chip disposed substantially at the center of said system board; (c) a plurality of large scale programmable logic devices disposed on said system board to substantially surround the circumference of said microprocessor chip, said plurality of wirings interconnecting at least one of said plurality of large scale programmable logic devices to said at least one microprocessor chip; and (d) a plurality of small scale programmable logic devices disposed outside said large scale programmable logic devices, said plurality of wiring interconnecting at least one of said plurality of small scale programmable logic devices to at least one of said plurality of large scale programmable logic devices.
Claim 9
Dependent Claim
21 words
The programmable one-board computer of claim 6 further comprising at least one memory coupled to said at least one microprocessor chip.
Claim 10
Dependent Claim
32 words
The programmable one-board computer of claim 6 further comprising at least one memory coupled to at least one of said plurality of large scale programmable logic devices by said plurality of wirings.
Claim 11
Dependent Claim
32 words
The programmable one-board computer of claim 6 further comprising at least one memory coupled to at least one of said plurality of small scale programmable logic devices by said plurality of wirings.
Claim 12
Dependent Claim
36 words
The programmable one-board computer of claim 6 wherein said plurality of large scale programmable logic devices are coupled to said plurality of small scale programmable logic devices by said plurality of wirings in a hierarchial structure.
Claim 13
Independent Claim
116 words
A method of altering programmable logic devices of a programmable one-board computer to an actual circuit of a computer system, the method comprising the steps of: (a) inputting a designed logic circuit into a development tool; (b) dividing said designed logic circuit into partial circuits stored in said development tool; (c) correlating said partial circuits with actual circuits of programmable logic devices which have already been designed and stored in a data base of said development tool; (d) using said actual circuits of programmable logic devices which have already been designed on the programmable logic devices of the programmable one-board computer to alter the programmable logic devices to create the actual circuit of the computer system.
Claim 14
Independent Claim
116 words
A method of altering programmable logic devices of a programmable one-board computer to an actual circuit of a computer system, the method comprising the steps of: (a) inputting a designed logic circuit into a development tool; (b) dividing said designed logic circuit into partial circuits stored in said development tool; (c) correlating said partial circuits with actual circuits of programmable logic devices which have already been designed and stored in a data base of said development tool; (d) using said actual circuits of programmable logic devices which have already been designed on the programmable logic devices of the programmable one-board computer to alter the programmable logic devices to create the actual circuit of the computer system.
Claim 15
Independent Claim
91 words
A method of verifying operations of a logic circuit comprising the steps of: (a) dividing a designed logic circuit using a development tool into portions that may be represented by pre-stored programmable logic device circuits; (b) alternating programmable logic devices of a programmable one-board computer to correlate with said pre-stored programmable logic device circuits so as to form an actual circuit that equates to said logic circuit; (c) inputting test signals into said actual circuit; and (d) monitoring outputs of said actual circuit to verify the operations of the logic circuit.
Claim 16
Independent Claim
91 words
A method of verifying operations of a logic circuit comprising the steps of: (a) dividing a designed logic circuit using a development tool into portions that may be represented by pre-stored programmable logic device circuits; (b) alternating programmable logic devices of a programmable one-board computer to correlate with said pre-stored programmable logic device circuits so as to form an actual circuit that equates to said logic circuit; (c) inputting test signals into said actual circuit; and (d) monitoring outputs of said actual circuit to verify the operations of the logic circuit.
Claim 17
Dependent Claim
47 words
A method of verifying operations of a logic circuit according to claim 12 wherein said test signals are a test vector for fault simulation to produce internal failures within said actual circuit as to rapidly estimate in real time a fault detection rate of said test vector.
Claim 18
Dependent Claim
31 words
A method of verifying operations of a logic circuit according to claim 12 wherein said test signals are input patterns to rapidly obtain real time output patterns of the actual circuit.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1996-10-11 | 1997-04-12 | 1997-10-12 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2000-10-11 | 2001-04-12 | 2001-10-12 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2004-10-11 | 2005-04-12 | 2005-10-12 | $7700.00 | Window Closed / Lapsed |