US4947357A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Scan testing a digital system using scan chains in integrated circuits
Assignee: Stardent Computer Inc
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Filing: 1988-02-24
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Granted: 1990-08-07
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Expires: 2008-02-24
Abstract
Abstract A digital system that includes a plurality of integrated circuits disposed on a circuit board, each integrated circuit comprising a plurality of scan chains, each scan chain scanning data from a scan input to a scan output in response to a scan clock; each scan input is coupled to a first pad of the integrated circuit, and the scan outputs are multiplexed to a second pad of the integrated circuit; the second pads of the integrated circuits are multiplexed to a port of the circuit board. A controller selects one of the integrated circuits for scanning, the controller selecting the second pad of the selected integrated circuit for coupling to the port of the circuit board; and the controller also selects one of the plurality of scan chains in the selected integrated circuit for scanning, the controller coupling the scan clock to the selected scan chain and selecting the scan output of the selected scan chain for coupling to the second pad of the selected integrated circuit.
Inventors
- 👤 W. Kem Stewart
- 👤 Lester M. Crudele
- 👤 Jonathan L. Miller
- 👤 Marco E. Riera
- 👤 Bruce E. Schurmann
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 22:44
CPC Classifications
G; G01; G01R; G01R31/00; G01R31/28; G01R31/317; G01R31/3181; G01R31/3185; G01R31/318533; G01R31/318558
Claims Analysis
Total Claims: 6
Claim 1
Independent Claim
189 words
A digital system comprising a plurality of integrated circuits disposed on a circuit board, each integrated circuit comprising a plurality of scan chains, each said scan chain scanning data from a scan input thereof to a scan output thereof in response to a scan clock, each said scan input being coupled to a first pad of said integrated circuit, the scan outputs being multiplexed to a second pad of said integrated circuit, said second pad of at least one of said plurality of integrated circuits being multiplexed with said second pad of another one of said integrated circuits to a port of said circuit board, a controller for selecting one of said plurality of integrated circuits for scanning, said controller selecting the second pad of said selected integrated circuit for coupling to said port of said circuit board, and said controller further selecting one of said plurality of scan chains in said selected integrated circuit for scanning, said controller coupling said scan clock to said selected scan chain and selecting the scan output of said selected scan chain for coupling to said second pad of said selected integrated circuit.
Claim 2
Dependent Claim
189 words
A digital system comprising a plurality of integrated circuits disposed on a circuit board, each integrated circuit comprising a plurality of scan chains, each said scan chain scanning data from a scan input thereof to a scan output thereof in response to a scan clock, each said scan input being coupled to a first pad of said integrated circuit, the scan outputs being multiplexed to a second pad of said integrated circuit, said second pad of at least one of said plurality of integrated circuits being multiplexed with said second pad of another one of said integrated circuits to a port of said circuit board, a controller for selecting one of said plurality of integrated circuits for scanning, said controller selecting the second pad of said selected integrated circuit for coupling to said port of said circuit board, and said controller further selecting one of said plurality of scan chains in said selected integrated circuit for scanning, said controller coupling said scan clock to said selected scan chain and selecting the scan output of said selected scan chain for coupling to said second pad of said selected integrated circuit.
Claim 3
Dependent Claim
95 words
The digital system of claim 1 wherein at least one of said plurality of scan chains in at least one of said plurality of integrated circuits comprises a set of scannable elements, each said scannable element being disposed between a pad and functional circuitry of said integrated circuit and comprising a switch, responsive to a control signal, for coupling data between said pad and said functional circuitry in a first operating mode, and a latch for storing said data, and wherein said switch decouples said pad from said functional circuitry in a second operating mode.
Claim 4
Dependent Claim
268 words
A digital system comprising a plurality of circuit boards, each circuit board including a plurality of integrated circuits, each said integrated circuit comprising a plurality of scan chains, each said scan chain scanning data from a scan input thereof to a scan output thereof in response to a scan clock, each said scan input being coupled to a first pad of the integrated circuit, the scan outputs being multiplexed to a second pad of the integrated circuit, said second pad of at least one of said plurality of integrated circuits of each said circuit board being multiplexed with said second pad of another one of said integrated circuits to a port of said circuit board, said port of at least one of said plurality of circuit boards being multiplexed with said port of another one of said circuit boards to a system output port, a controller for selecting one of said plurality of circuit boards for scanning, said controller selecting said port of said circuit board for coupling to said system output port, said controller further selecting one of said plurality of integrated circuits on said selected one of said circuit boards for scanning, said controller selecting the second pad of said selected integrated circuit for coupling to said selected port of said selected circuit board, and said controller further selecting one of said plurality of scan chains in said selected integrated circuit for scanning, said controller coupling said scan clock to said selected scan chain and selecting the scan output of said selected scan chain for coupling to said selected second pad of said selected integrated circuit.
Claim 5
Dependent Claim
268 words
A digital system comprising a plurality of circuit boards, each circuit board including a plurality of integrated circuits, each said integrated circuit comprising a plurality of scan chains, each said scan chain scanning data from a scan input thereof to a scan output thereof in response to a scan clock, each said scan input being coupled to a first pad of the integrated circuit, the scan outputs being multiplexed to a second pad of the integrated circuit, said second pad of at least one of said plurality of integrated circuits of each said circuit board being multiplexed with said second pad of another one of said integrated circuits to a port of said circuit board, said port of at least one of said plurality of circuit boards being multiplexed with said port of another one of said circuit boards to a system output port, a controller for selecting one of said plurality of circuit boards for scanning, said controller selecting said port of said circuit board for coupling to said system output port, said controller further selecting one of said plurality of integrated circuits on said selected one of said circuit boards for scanning, said controller selecting the second pad of said selected integrated circuit for coupling to said selected port of said selected circuit board, and said controller further selecting one of said plurality of scan chains in said selected integrated circuit for scanning, said controller coupling said scan clock to said selected scan chain and selecting the scan output of said selected scan chain for coupling to said selected second pad of said selected integrated circuit.
Claim 6
Dependent Claim
95 words
The digital system of claim 3 wherein at least one of said plurality of scan chains in at least one of said plurality of integrated circuits comprises a set of scannable elements, each said scannable element being disposed between a pad and functional circuitry of said integrated circuit and comprising a switch, responsive to a control signal, for coupling data between said pad and said functional circuitry in a first operating mode, and a latch for storing said data, and wherein said switch decouples said pad from said functional circuitry in a second operating mode.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1993-08-06 | 1994-02-05 | 1994-08-07 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1997-08-06 | 1998-02-05 | 1998-08-07 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2001-08-06 | 2002-02-05 | 2002-08-07 | $7700.00 | Window Closed / Lapsed |