Protection apparatus for series pass MOSFETS

Claim 2

A protection apparatus for protecting the input of a series pass-through FET transistor from excessive voltages applied to the input source or drain terminal electrode of the FET where the source to drain path of said FET transistor is connected between an input terminal and output terminal, comprising: a protection FET transistor connected as a FET diode and with said diode connected between said input drain or source terminal and said gate electrode of said pass-through transistor.

Claim 3

The protection apparatus according to claim 1, wherein said FETs are MOSFETs.

Claim 4

The protection apparatus according to claim 2, further including a diode having a cathode electrode coupled to said gate electrode of said pass-through FET and an anode electrode coupled to said source of operating potential and operative to suppress leakage current flow.

Claim 5

The protection apparatus according to claim 3, wherein said diode is a PN diode.

Claim 6

The protection apparatus according to claim 2, wherein the gate oxides of said pass-through MOSFET is approximately 10 nm thick.

Claim 7

The protection apparatus according to claim 1, wherein said FET diode turns on when the voltage across the gate electrode of said pass-through FET exceeds the threshold voltage (VT) of said FET diode.

Claim 8

The protection circuit according to claim 6, wherein the voltage at the gate electrode of said pass-through FET is the voltage across the oxide of an MOS pass-through FET, whereby the oxide voltage is limited to a value below the gate oxide breakdown.

Claim 9

A protection apparatus for protecting the input of a series pass-through FET transistor from excessive voltages applied to the input source or drain terminal electrode of the FET where the source to drain path of said FET transistor is connected between an input terminal and output terminal, comprising: a protection FET transistor connected as a FET diode and with said diode connected between said input drain or source terminal and said gate electrode of said pass-through transistor; and an inverter including a P and an N channel FET each having a source, drain and gate electrode, with the source electrode of said P channel FET coupled to a source of operating potential, with the drain electrodes of said P and N channel FETs coupled together to an output, with the source electrode of said N channel FET coupled to a point of reference potential, and with the gate electrodes of said N and P channel FETs connected together and coupled to said drain electrode of said pass-through FET.

Claim 10

A protection apparatus for protecting the input of a series pass-through FET transistor from excessive voltages applied to the input source or drain terminal electrode of the FET where the source to drain path of said FET transistor is connected between an input terminal and output terminal, comprising: a protection FET transistor connected as a FET diode and with said diode connected between said input drain or source terminal and said gate electrode of said pass-through transistor; and an inverter including a P and an N channel FET each having a source, drain and gate electrode, with the source electrode of said P channel FET coupled to a source of operating potential, with the drain electrodes of said P and N channel FETs coupled together to an output, with the source electrode of said N channel FET coupled to a point of reference potential, and with the gate electrodes of said N and P channel FETs connected together and coupled to said drain electrode of said pass-through FET.

Claim 11

The protection apparatus according to claim 8, wherein said P channel and N channel FETs are MOSFETs.

Claim 12

A protection circuit for a MOS pass-through FET, comprising: a CMOS inverter having a P channel and an N channel MOSFET, each having a drain, source and gate electrode, with the source electrode of said P channel FET adapted to be connected to a source of operating potential, with the drain electrodes of said P and N channel FETs connected together to provide an output terminal with the source electrode of said N channel FET connected to a point of reference potential, and with the gate electrodes of said N and P channel FETs connected together to form an input terminal, a series pass-through MOSFET having a source drain and gate electrode and having the source electrode connected to an input terminal pad for receiving input signals, and having the drain electrode connected to the input terminal of said inverter, and having a gate electrode coupled to said source of operating potential, and a protection MOSFET transistor having a source, drain and gate electrode and connected as a diode with the common source gate electrode connection of said protection MOSFET connected to the source electrode of said series MOSFET and with the drain electrode of said protection MOSFET connected to the gate electrode of said series MOSFET, whereby when a voltage at said input terminal pad exceeds said operating potential voltage, said protection MOS conducts to limit the voltage (VGS) applied to the gate oxide of said pass-through MOSFET.

Claim 13

A protection circuit for a MOS pass-through FET, comprising: a CMOS inverter having a P channel and an N channel MOSFET, each having a drain, source and gate electrode, with the source electrode of said P channel FET adapted to be connected to a source of operating potential, with the drain electrodes of said P and N channel FETs connected together to provide an output terminal with the source electrode of said N channel FET connected to a point of reference potential, and with the gate electrodes of said N and P channel FETs connected together to form an input terminal, a series pass-through MOSFET having a source drain and gate electrode and having the source electrode connected to an input terminal pad for receiving input signals, and having the drain electrode connected to the input terminal of said inverter, and having a gate electrode coupled to said source of operating potential, and a protection MOSFET transistor having a source, drain and gate electrode and connected as a diode with the common source gate electrode connection of said protection MOSFET connected to the source electrode of said series MOSFET and with the drain electrode of said protection MOSFET connected to the gate electrode of said series MOSFET, whereby when a voltage at said input terminal pad exceeds said operating potential voltage, said protection MOS conducts to limit the voltage (VGS) applied to the gate oxide of said pass-through MOSFET.

Claim 14

The protection circuit according to claim 10, further including a unidirectional current conducting device having one terminal connected to the gate electrode of said series pass MOSFET, and the other terminal connected to said point of operating potential and operative to suppress the flow of leakage current.

Claim 15

The protection apparatus according to claim 11, wherein said unilateral current conducting device is a diode having a cathode electrode connected to said gate electrode of said series pass MOSFET and an anode electrode connected to said source of operating potential.

Claim 16

The protection apparatus according to claim 12, wherein said diode is a PN diode.

Claim 17

The protection apparatus according to claim 13, wherein said gate oxide of said series pass MOSFET approximately 10 nm thick.

Claim 18

The protection apparatus according to claim 13, wherein said inverter, said series pass MOSFET, said protection MOSFET and said PN diode are formed on the same substrate.