US5328861A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Method for forming thin film transistor
Assignee: Samsung Display Co Ltd
•
Filing: 1992-10-29
•
Granted: 1994-07-12
•
Expires: 2012-10-29
Abstract
Abstract An amorphous semiconductor layer is deposited on an insulating substrate, and an excimer laser is radiated thereon, and thus the amorphous is crystallized. A silicon oxide layer is deposited on the semiconductor layer, and a silicon nitride layer is deposited on the silicon oxide layer to be thicker than the silicon oxide layer. Thereafter, a gate electrode is formed on the silicon nitride layer. Thus, there is provided a method for a thin film transistor having a good mobility of carriers and a good characteristic of a breakdown voltage in that a gate insulating film is formed of a double-layer structure having the silicon oxide and silicon nitride layers.
Inventors
- 👤 Tatsuya Miyakawa
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-31 15:44
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/01; H10D30/021; H10D30/031; H10D30/0312; H10D30/0314; H10D30/0321; H10D30/60; H10D30/67; H10D30/6729; H10D30/6737; H10D30/6739; Y; Y10; Y10S; Y10S148/00; Y10S148/09; Y10S148/15
Claims Analysis
Total Claims: 10
Claim 1
Independent Claim
136 words
A method for manufacturing a thin film transistor comprising the steps of: forming a polysilicon semiconductor layer having a source region, a drain region, and a channel region, on an insulating substrate; directly depositing a two-layer gate insulating film on said polysilicon semiconductor layer, said two-layer gate insulating film having: a silicon oxide layer formed on said channel region of said polysilicon semiconductor layer by a sputtering process; and a silicon nitride layer formed on said silicon oxide layer by a plasma CVD process, said silicon nitride layer having a thickness that is greater than a thickness of said silicon oxide layer; and then forming a gate electrode on said silicon nitride layer; and forming a source electrode and a drain electrode on said source region and said drain region of said polysilicon semiconductor layer, respectively.
Claim 2
Independent Claim
136 words
A method for manufacturing a thin film transistor comprising the steps of: forming a polysilicon semiconductor layer having a source region, a drain region, and a channel region, on an insulating substrate; directly depositing a two-layer gate insulating film on said polysilicon semiconductor layer, said two-layer gate insulating film having: a silicon oxide layer formed on said channel region of said polysilicon semiconductor layer by a sputtering process; and a silicon nitride layer formed on said silicon oxide layer by a plasma CVD process, said silicon nitride layer having a thickness that is greater than a thickness of said silicon oxide layer; and then forming a gate electrode on said silicon nitride layer; and forming a source electrode and a drain electrode on said source region and said drain region of said polysilicon semiconductor layer, respectively.
Claim 3
Dependent Claim
19 words
The method according to claim 1, wherein the thickness of said silicon oxide layer is 100 to 400 Å.
Claim 4
Dependent Claim
19 words
The method according to claim 1, wherein the thickness of said silicon nitride layer is 1000 to 2000 Å.
Claim 5
Dependent Claim
35 words
The method according to claim 1, wherein said polysilicon semiconductor layer forming step includes a step of depositing an amorphous silicon, and a step of crystallizing said armorphous silicon to form said polysilicon semiconductor layer.
Claim 6
Dependent Claim
24 words
The method according to claim 4, wherein said amorphous silicon crystallizing step includes an excimer laser radiation step to form said polysilicon semiconductor layer.
Claim 7
Dependent Claim
34 words
The method according to claim 1, wherein said polysilicon semiconductor layer forming step includes a step of implanting dopants in said source region and said drain region, and a step of activating said dopants.
Claim 8
Dependent Claim
22 words
The method according to claim 6, wherein said dopant activation step includes a step of radiating an excimer laser on said dopant.
Claim 9
Dependent Claim
19 words
The method according to claim 4, wherein the thickness of said silicon oxide layer is 100 to 400 Å.
Claim 10
Dependent Claim
19 words
The method according to claim 4, wherein the thickness of said silicon nitride layer is 1000 to 2000 Å.
References Cited (Backward Citations)
US4264376A
Cited
JPS5522878A
Cited
US4232327A
Cited
US4266985A
Cited
US4885616A
Cited
JPS61150385A
Cited
JPH01209764A
Cited
JPH0265274A
Cited
US4951113A
Cited
JPH0418524A
Cited
JPH0485969A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1997-07-11 | 1998-01-10 | 1998-07-12 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2001-07-11 | 2002-01-10 | 2002-07-12 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2005-07-11 | 2006-01-10 | 2006-07-12 | $7700.00 | Window Closed / Lapsed |