Process for forming resist pattern

Claim 1

A process for forming a multilevel resist pattern, which comprises steps of: coating a semiconductor substrate to be fabricated with a resist to form a lower resist layer thereon; coating the lower resist layer with a resist composition comprising an azide compound and a copolymer of the formula ( 1 ): ##STR8## wherein, R 1 means CH 3 , CF 3 , CN, CH 2 OH, or CH 2 CO 2 R, wherein R means an alkyl having 1 to 5 carbon atoms R 2 means a hydrocarbon radical having at least one Si, R 3 means OH, O--C(CH 3 ) 3 , NH 2 , or NHCH 2 OH, and, a ratio of n to m is more than 0 and is 1 or less than 1, to form an upper resist layer thereon, heating the substrate to cause a cross-linking in the said upper resist layer, exposing the resist to a predetermined pattern of high energy radiation to form a latent image in the resist layer corresponding to the radiation pattern, and developing the pattern-wise exposed resist layer to selectively remove the exposed areas of the resist with a developer to form an upper resist pattern.