US5316966A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Method of providing mask alignment marks
Assignee: US Philips Corp
•
Filing: 1993-08-03
•
Granted: 1994-05-31
•
Expires: 2013-08-03
Abstract
Abstract A method of manufacturing mask alignment marks on an active surface of a semiconductor substrate (12) is disclosed, in which first, at least one layer (13) of a material resistant to oxidation is formed on the active surface, after which by a local etching of this layer, zones (15') for isolation by a field oxide, are defined simultaneously with the alignment marks (17'). There are formed, after the local etching of the layer (13) of anti-oxidation material while using the remaining parts of the anti-oxidation layer as a mask, depressions (26) at the substrate surface of a given depth at least at locations containing the alignment marks, which locations are designated as alignment windows (18) and the surface of the substrate is then exposed within the windows, and finally a thermal oxidation step is effected to obtain the field oxide (19'), during which the alignment marks (18) are simultaneously covered by oxide (24).
Inventors
- 👤 Paulus A. van der Plas
- 👤 Herbert Lifka
- 👤 Robertus D. J. Verhaar
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-02 08:38
CPC Classifications
H; H10; H10P; H10P72/00; H10P72/50; H10W; H10W46/00; H10P14/00; H10P14/60; H10P14/61; H10W46/501; Y; Y10; Y10S; Y10S148/00; Y10S148/102
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
202 words
A method of providing mask alignment marks on an active surface of a semiconductor substrate, in which first at least one layer of a material resistant to oxidation is formed on this active surface, after which by a local etching of this layer, zones for isolation by a thick oxide, designated as a field oxide, are defined simultaneously with the alignment marks, and during a later step the zones for the isolation by field oxide and said alignment marks thus defined are subjected to a thermal oxidation, the remainder of the active surface being protected from oxidation by a remaining part of the layer of anti-oxidation material, wherein, after the local etching of the layer of anti-oxidation material and while utilizing the remaining parts of the anti-oxidation layer as a selective mask, substantially flat-bottomed depressions are formed at the surface of the substrate having a given depth at least at locations which contain the alignment marks, which locations are designated as alignment windows, the surface of the substrate is then exposed within said windows, and finally a thermal oxidation step is effected for forming the field oxide, during which the alignment marks are simultaneously covered by an oxide layer of uniform thickness.
Claim 2
Independent Claim
202 words
A method of providing mask alignment marks on an active surface of a semiconductor substrate, in which first at least one layer of a material resistant to oxidation is formed on this active surface, after which by a local etching of this layer, zones for isolation by a thick oxide, designated as a field oxide, are defined simultaneously with the alignment marks, and during a later step the zones for the isolation by field oxide and said alignment marks thus defined are subjected to a thermal oxidation, the remainder of the active surface being protected from oxidation by a remaining part of the layer of anti-oxidation material, wherein, after the local etching of the layer of anti-oxidation material and while utilizing the remaining parts of the anti-oxidation layer as a selective mask, substantially flat-bottomed depressions are formed at the surface of the substrate having a given depth at least at locations which contain the alignment marks, which locations are designated as alignment windows, the surface of the substrate is then exposed within said windows, and finally a thermal oxidation step is effected for forming the field oxide, during which the alignment marks are simultaneously covered by an oxide layer of uniform thickness.
Claim 3
Dependent Claim
79 words
A method as claimed in claim 1, characterized in that said depressions are formed by a specific thermal oxidation step such that this step leads to a conversion of the semiconductor into oxide over a depth equal to the said given depth and that, after having exposed the surface of the semiconductor within the said alignment windows, the oxidation step already mentioned for the formation of the field oxide is effected, which is complementary to the specific oxidation step.
Claim 4
Dependent Claim
76 words
A method as claimed in claim 1, characterized in that said depressions are formed by selective etching only in the alignment windows, which are defined by means of a mask of photosensitive resin, and in that then the remaining parts of the anti-oxidation layer are withdrawn in said windows and with the same mask, after which the mask of photosensitive resin is withdrawn and a single thermal oxidation step is effected for forming the field oxide.
Claim 5
Dependent Claim
78 words
A method as claimed in claim 1, characterized in that the said depressions are formed by selective etching while utilizing only the anti-oxidation layer as a selective mask, in that then the remaining parts of the anti-oxidation layer are withdrawn in the alignment windows, which are then defined by means of a mask of photosensitive resin, after which the mask of photosensitive resin is withdrawn and a single thermal oxidation step is effected for forming the field oxide.
Claim 6
Dependent Claim
31 words
A method as claimed in claim 1, characterized in that said given depth of the depressions is about 1/4 of the wavelength of the light utilized to exploit the alignment marks.
Claim 7
Dependent Claim
21 words
A method as claimed in claim 5, characterized in that said depth of the depressions lies between 100 and 150 nm.
References Cited (Backward Citations)
US4233091A
Cited
JPS5972724A
Cited
JPS59158519A
Cited
JPS6097639A
Cited
JPS61100928A
Cited
US5051374A
Cited
US4981529A
Cited
US4893163A
Cited
US5106432A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1997-05-30 | 1997-11-29 | 1998-05-31 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2001-05-30 | 2001-11-29 | 2002-05-31 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2005-05-30 | 2005-11-29 | 2006-05-31 | $7700.00 | Window Closed / Lapsed |