Patent FR988563A successfully refreshed from Google Patents.
Patent US5315156A successfully refreshed from Google Patents.
US5315156A
Expired / Lapsed
US
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Transistor device layout
Assignee: STMicroelectronics lnc USA
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Filing: 1992-11-30
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Granted: 1994-05-24
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Expires: 2012-11-30
Abstract
Abstract A modified transistor layout allows operation at high frequencies without adversely effecting transistor power gain. The base and collector circuits are modified in order to minimize ground bar resistance and feedback problems between the input and output circuits. This reduces the applied negative feedback and maximizes gain. The collector contact bar and the output capacitor are mounted directly on the collector island such that the output capacitor is wired directly to the grounded package metal and the collector is wired to the collector contact bar. This eliminates the need to wirebond to areas on the collector island that are covered with the eutectic run-out which results from mounting the transistor chip on the collector island.
Inventors
- 👤 Joel M. Lott
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-08 22:31
CPC Classifications
H; H10; H10W; H10W44/00; H10W44/20; H10W44/226; H10W72/00; H10W72/50; H10W72/541; H10W72/547; H10W72/5473; H10W72/551; H10W72/552; H10W72/5522; H10W72/5524; H10W72/59; H10W72/90; H10W72/951; H10W72/952; H10W90/00; H10W90/701; H10W90/751; H10W90/756
Claims Analysis
Total Claims: 15
Claim 1
Independent Claim
127 words
A transistor layout for use in high frequency power gain circuits, comprising: a transistor chip having a base, emitter, and collector; a collector island connected to the collector of the transistor chip; an emitter lead and a collector lead; a collector contact bar mounted directly on the collector island; an input capacitor having an attached ground bar; a collector lead connected to the collector contact bar through a collector bondwire; a first base connection which connects the base of the transistor chip to the input capacitor ground bar through a first base bondwire and a second base connection which connects the base of the transistor chip directly to the metal of the transistor chip package; and an output capacitor which is mounted directly on the collector island.
Claim 2
Dependent Claim
127 words
A transistor layout for use in high frequency power gain circuits, comprising: a transistor chip having a base, emitter, and collector; a collector island connected to the collector of the transistor chip; an emitter lead and a collector lead; a collector contact bar mounted directly on the collector island; an input capacitor having an attached ground bar; a collector lead connected to the collector contact bar through a collector bondwire; a first base connection which connects the base of the transistor chip to the input capacitor ground bar through a first base bondwire and a second base connection which connects the base of the transistor chip directly to the metal of the transistor chip package; and an output capacitor which is mounted directly on the collector island.
Claim 3
Dependent Claim
31 words
The layout of claim 1, wherein the emitter lead is connected to the emitter by an emitter bondwire which connects the emitter lead to the input capacitor and the transistor chip.
Claim 4
Dependent Claim
11 words
The layout of claim 2, wherein the emitter bondwire is gold.
Claim 5
Dependent Claim
14 words
The layout of claim 3, wherein the input capacitor has an attached ground bar.
Claim 6
Dependent Claim
12 words
The layout of claim 4, wherein the first base bondwire is gold.
Claim 7
Dependent Claim
12 words
The layout of claim 4, wherein the second base bondwire is gold.
Claim 8
Dependent Claim
11 words
The layout of claim 1, wherein the input capacitor is MOS.
Claim 9
Dependent Claim
23 words
The layout of claim 7, wherein the output capacitor is connected to the metal of the transistor chip package through a shunt bondwire.
Claim 10
Dependent Claim
13 words
The layout of claim 8, wherein the collector contact bar is gold metallized.
Claim 11
Dependent Claim
11 words
The layout of claim 8, wherein the collector bondwire is gold.
Claim 12
Dependent Claim
11 words
The layout of claim 8, wherein the shunt bondwire is gold.
Claim 13
Dependent Claim
13 words
The layout of claim 8, wherein the package metal is at ground potential.
Claim 14
Dependent Claim
11 words
The layout of claim 1, wherein the output capacitor is MOS.
Claim 15
Dependent Claim
15 words
The layout of claim 8, wherein the output capacitor has an attached collector contact bar.
References Cited (Backward Citations)
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1997-05-23 | 1997-11-22 | 1998-05-24 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2001-05-23 | 2001-11-22 | 2002-05-24 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2005-05-23 | 2005-11-22 | 2006-05-24 | $7700.00 | Window Closed / Lapsed |